PIC16F684 datasheet(16/192 Pages) MICROCHIP

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PIC16F684

DS41202F-page 14

2.2.2.4

PIE1 Register

The PIE1 register contains the peripheral interrupt

enable bits, as shown in Register 2-4.

Note:

Bit PEIE of the INTCON register must be

set to enable any peripheral interrupt.

PIE1: PERIPHERAL INTERRUPT ENABLE REGISTER 1

R/W-0

EEIE

ADIE

CCP1IE

C2IE

C1IE

OSFIE

TMR2IE

TMR1IE

bit 7

bit 0

Legend:

R = Readable bit

W = Writable bit

U = Unimplemented bit, read as ‘0’

-n = Value at POR

‘1’ = Bit is set

‘0’ = Bit is cleared

x = Bit is unknown

bit 7

EEIE: EE Write Complete Interrupt Enable bit

= Enables the EE write complete interrupt

= Disables the EE write complete interrupt

bit 6

ADIE: A/D Converter (ADC) Interrupt Enable bit

= Enables the ADC interrupt

= Disables the ADC interrupt

bit 5

CCP1IE: CCP1 Interrupt Enable bit

= Enables the CCP1 interrupt

= Disables the CCP1 interrupt

bit 4

C2IE: Comparator 2 Interrupt Enable bit

= Enables the Comparator 2 interrupt

= Disables the Comparator 2 interrupt

bit 3

C1IE: Comparator 1 Interrupt Enable bit

= Enables the Comparator 1 interrupt

= Disables the Comparator 1 interrupt

bit 2

OSFIE: Oscillator Fail Interrupt Enable bit

= Enables the oscillator fail interrupt

= Disables the oscillator fail interrupt

bit 1

TMR2IE: Timer2 to PR2 Match Interrupt Enable bit

= Enables the Timer2 to PR2 match interrupt

= Disables the Timer2 to PR2 match interrupt

bit 0

TMR1IE: Timer1 Overflow Interrupt Enable bit

= Enables the Timer1 overflow interrupt

= Disables the Timer1 overflow interrupt

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