PIC16F684 datasheet(107/192 Pages) MICROCHIP

107 / 192 page

DS41202F-page 105

PIC16F684

TABLE 12-5:

INITIALIZATION CONDITION FOR SPECIAL REGISTERS

OSCTUNE

90h

---0 0000

---u uuuu

ANSEL

91h

1111 1111

uuuu uuuu

PR2

92h

1111 1111

WPUA

95h

--11 -111

uuuu uuuu

IOCA

96h

--00 0000

--uu uuuu

VRCON

99h

0-0- 0000

u-u- uuuu

EEDAT

9Ah

0000 0000

uuuu uuuu

EEADR

9Bh

0000 0000

uuuu uuuu

EECON1

9Ch

---- x000

---- q000

---- uuuu

EECON2

9Dh

---- ----

ADRESL

9Eh

xxxx xxxx

uuuu uuuu

ADCON1

9Fh

-000 ----

-uuu ----

Condition

Program

Counter

Status

PCON

Power-on Reset

000h

0001 1xxx

--01 --0x

MCLR Reset during normal operation

000h

000u uuuu

--0u --uu

MCLR Reset during Sleep

000h

0001 0uuu

--0u --uu

WDT Reset

000h

0000 uuuu

--0u --uu

WDT Wake-up

PC + 1

uuu0 0uuu

--uu --uu

Brown-out Reset

000h

0001 1uuu

--01 --u0

Interrupt Wake-up from Sleep

PC + 1(1)

uuu1 0uuu

--uu --uu

Legend: u = unchanged, x = unknown, – = unimplemented bit, reads as ‘0’.

Note 1:

When the wake-up is due to an interrupt and Global Interrupt Enable bit, GIE, is set, the PC is loaded with

the interrupt vector (0004h) after execution of PC + 1.

TABLE 12-4:

INITIALIZATION CONDITION FOR REGISTERS (CONTINUED)

Address

Power-on

Reset

MCLR Reset

WDT Reset (Continued)

Brown-out Reset(1)

Wake-up from Sleep through

Interrupt

Wake-up from Sleep through

WDT Time-out (Continued)

Legend: u = unchanged, x = unknown, – = unimplemented bit, reads as ‘0’, q = value depends on condition.

Note 1:

If VDD goes too low, Power-on Reset will be activated and registers will be affected differently.

One or more bits in INTCON and/or PIR1 will be affected (to cause wake-up).

When the wake-up is due to an interrupt and the GIE bit is set, the PC is loaded with the interrupt

vector (0004h).

See Table 12-5 for Reset value for specific condition.

If Reset was due to brown-out, then bit 0 = 0. All other Resets will cause bit 0 = u.

Port pins with analog functions controlled by the ANSEL register will read ‘0’ immediately after a Reset

even though the data latches are either undefined (POR) or unchanged (other Resets).

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