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ADBMS2950BCCSZ датащи(PDF) 64 Page - Analog Devices |
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ADBMS2950BCCSZ датащи(HTML) 64 Page - Analog Devices |
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64 / 97 page ![]() ADBMS2950B Data Sheet Rev. 0 | Page 64 of 97 SPI Controller Parameter Timing Relationship to Primary SPI Timing Specifications at tCLK = 0.5 µs CSBM Falling to SCKM Rising tCLK + t3 Min 0.6 µs SCKM Falling to SDIOM, SDOM Valid Controller requires < tCLK 1 When using the isoSPI, t4 is generated internally and is a minimum of 30 ns. Also, t3 = tCLK − t4. When using the SPI, t3, and t4 are the low and high times of the SCK input, each with a specified minimum of 100 ns. Table 86. I2C Controller Timing I2C Controller Parameter Timing Relationship to Primary SPI Timing Specification at tCLK = 0.5 µs SCL Clock Frequency 1 ÷ (2 × tCLK) Max 1 MHz tHD;STA t3 Min 100 ns tLOW tCLK Min 0.5 µs tHIGH tCLK Min 0.5 µs tSU;STA tCLK + t14 Min 0.53 µs tHD;DAT t4 Min 30 ns tSU;DAT t3 Min 100 ns tSU;STO tCLK + t14 Min 0.53 µs tBUF 3 × tCLK Min 1.5 µs 1 When using the isoSPI, t4 is generated internally and is a minimum of 30 ns. Also, t3 = tCLK − t4. When using the SPI, t3, and t4 are the low and high times of the SCK input, each with a specified minimum of 100 ns. SPI Sequence Example The following steps are required to write and read any number of bytes to an SPI peripheral connected to the ADBMS2950B: 1. Ensure that GPIOs/GPOs used for SPI transactions are not actively forced low through CFGA, CFGB register settings. For multiple chip-selects, if the default GPIO2 is not used, the alternative CS must be manually asserted through CFGA. 2. Write data and control action through WRCOMM. 3. Perform transmission through STCOMM: 4 bytes for command PEC and 3 bytes per byte to be transmitted, maximum 9 bytes, independent of the length of the daisy-chain as all ICs of the daisy-chain perform the transmission simultaneously (no daisy-chain shift register activated for this command). The data is do not care, for example, it can be set to all 0x00. 4. Get data received during transmission through RDCOMM if required (for example, not needed if data is written to the peripheral only). 5. Continue with step 2 for any additional bytes. The following is an example for writing 5 bytes (0xA1, 0xB2, 0xC3, 0xD4, 0xE5) and reading back all bytes received during the transaction on the SDI input pin: 1. Write data and control action through WRCOMM. ICOM0 = 0x8 (CS low), FCOM0 = 0x0 (hold CS low) ICOM1 = 0x8 (CS low), FCOM1 = 0x0 (hold CS low) ICOM2 = 0x8 (CS low), FCOM2 = 0x0 (hold CS low) DATA0 = 0xA1, DATA1 = 0xB2, DATA2 = 0xC3 2. Perform transmission through STCOMM. STCOMM (4 bytes for command PEC) followed by 9 bytes. 3. Get data received during transmission through RDCOMM. DATA0 (SDI byte 0), DATA1 (SDI byte 1), DATA2 (SDI byte 2). 4. Write data and control action via WRCOMM for the last two remaining bytes. ICOM0 = 0x8 (CS low), FCOM0 = 0x0 (hold CS low) ICOM1 = 0x8 (CS low), FCOM1 = 0x9 (transmit CSBM high after byte transmission) ICOM2 = 0xF (no transit), FCOM2 = 0x9 DATA0 = 0xD4, DATA1 = 0xE5, DATA2 = 0xFF (3rd byte is do not care) 5. Perform transmission through STCOMM. STCOMM (4 bytes for CMD+PEC) followed by 6 bytes to transmit 2 bytes to the SPI peripheral only. It is also possible to send 9 bytes to keep the STCOMM common independent of number of bytes to be transmitted as the ICOM/FCOM registers define when to stop the transaction. 6. Get received data during transmission via RDCOMM. DATA0 (SDI byte 3), DATA1 (SDI byte 4) If several SPI peripherals are connected, whenever the default CSBM is not used, the host must select the peripheral through WRCFGA asserting the desired GPOx (CS of the peripheral) before sending the COMM commands. ICOMx and FCOMx must be set to 0x9 (instead of 0x8 and 0x0) for any byte to be transmitted, and the SPI sequence is terminated with a final WRCFGA de-asserting the used GPOx. I2C Sequence Example The following steps are required to write and read any number of bytes to an I2C peripheral connected to the ADBMS2950B: |
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