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ADBMS2950BCCSZ датащи(PDF) 27 Page - Analog Devices |
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ADBMS2950BCCSZ датащи(HTML) 27 Page - Analog Devices |
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27 / 97 page ![]() Data Sheet ADBMS2950B Rev. 0 | Page 27 of 97 Name Type BIT 10 BIT 9 BIT 8 BIT 7 BIT 6 BIT 5 BIT 4 BIT 3 BIT 2 BIT 1 BIT 0 Description RDV2D RD48 0 0 0 0 0 0 1 1 1 1 1 Reads V1ADC/V2ADC results (ADBMS6830B: RDAUXD). RDV2E RD48 0 0 0 0 0 1 0 0 1 0 1 Reads V2ADC results (ADBMS6830B: RDRAXD). RDXA RD48 0 0 0 0 0 1 1 0 0 0 0 Reads AUX ADC results (ADBMS6830B: RDSTATA). RDXB RD48 0 0 0 0 0 1 1 0 0 0 1 Reads AUX ADC results (ADBMS6830B: RDSTATB). RDXC RD48 0 0 0 0 0 1 1 0 0 1 1 Reads AUX ADC results (ADBMS6830B: RDSTATD). RDOC RD48 0 0 0 0 0 0 0 1 0 1 1 Read OCxADC results (ADBMS6830B: RDCVF). 0 0 0 0 0 0 1 0 1 1 1 ADBMS6830B compatible code RDFCF. RDSID RD48 0 0 0 0 0 1 0 1 1 0 0 Read SID register (ADBMS6830B: RDSID). RDCFGA RD48 0 0 0 0 0 0 0 0 0 1 0 Read CFGA register (ADBMS6830B: RDCFGA). RDCFGB RD48 0 0 0 0 0 1 0 0 1 1 0 Read CFGB register (ADBMS6830B: RDCFGB). RDCOMM RD48 1 1 1 0 0 1 0 0 0 1 0 Read COMM register (ADBMS6830B: RDCOMM). WRCFGA WR48 0 0 0 0 0 0 0 0 0 0 1 Write CFGA register (ADBMS6830B: WRCFGA). WRCFGB WR48 0 0 0 0 0 1 0 0 1 0 0 Write CFGB register (ADBMS6830B: WRCFGB). WRCOMM WR48 1 1 1 0 0 1 0 0 0 0 1 Write COMM register (ADBMS6830B: WRCOMM). STCOMM CMD 1 1 1 0 0 1 0 0 0 1 1 Send COMM register (ADBMS6830B: STCOMM). PLADC CMD 1 1 1 0 0 0 1 1 0 0 0 Poll IxADC, VBxADC, VxADC, and AUX ADC conversion completion (ADBMS6830B: PLADC). PLI1 CMD 1 1 1 0 0 0 1 1 1 0 0 Poll I1ADC and VB1ADC conversion completion (ADBMS6830B: PLCADC). PLI2 CMD 1 1 1 0 0 0 1 1 1 0 1 Poll I2ADC and VB2ADC conversion completion (ADBMS6830B: PLSADC). PLV CMD 1 1 1 0 0 0 1 1 1 1 0 Poll V1ADC and V2ADC conversion completion (ADBMS6830B: PLAUX1). PLX CMD 1 1 1 0 0 0 1 1 1 1 1 Poll AUX ADC conversion completion (ADBMS6830B: PLAUX2). RDALLI RD160 0 0 0 0 0 0 0 1 1 0 0 Read IxADC and VBxADC results. RDALLA RD160 0 0 0 0 1 0 0 1 1 0 0 Read IxADC and VBxADC accumulators. RDALLV RD160 0 0 0 0 0 1 1 0 1 0 1 Reads all external input V1ADC results and V9, V10 results measured by V2ADC only. RDALLR RD160 0 0 0 0 0 0 1 0 0 0 1 Reads all external input V2ADC results and V7, V8 results measured by V1ADC only. RDALLX RD160 0 0 0 0 1 0 1 0 0 0 1 Reads all AUX ADC results. RDALLC RD160 0 0 0 0 0 0 1 0 0 0 0 Read All configuration, flag and status registers. Timing Considerations This section shows how to calculate the length of SPI transactions when operating with a single device (Figure 19 or any of the subsequent figures with one device only) or when operating in a daisy-chain of pack and link monitor devices ADBMS2950B and optional cell monitor devices ADBMS6830B (see Figure 20, Figure 21, and Figure 22). Table 34 describes the parameters used for the calculation and the resulting timings. For the single device scenario NP = 1, NQ = 0 resulting in N = 1 is assumed. |
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