ADBMS2950BCCSZ datasheet(30/97 Pages) AD

30 / 97 page

ADBMS2950B

Data Sheet

Rev. 0 | Page 30 of 97

REFUP State

In the REFUP state, the host can communicate to the IC

through SPI or isoSPI. When VDD is above 11V, the DRIVE pin

is driven to ~5.7V. The oscillators, references, and UV/OV

supply monitors are operating in their specified range. The

OCxADC are set into operation if OCEN of CFGA register (see

Table 69) is 1. Any transition of OCEN from 0 to 1 also latches

the overcurrent configuration settings into the respective

internal registers that control the overcurrent detection. For

details, see the Overcurrent Configuration Update section.

By successfully receiving any ADC command (ADI1, ADI2,

ADV, and ADX), the IC enters the MEASURE State. Entering

the MEASURE state after power-up starts the ADC

initialization procedure (see Initialization Cycle section).

MEASURE State

The ADBMS2950B enters the MEASURE state after receiving at

least one ADI1, ADI2, ADV, or ADX command from within

REFUP State, and remains in the MEASURE state until power is

removed or the SRST command is sent.

In the MEASURE state, the host can communicate with the IC

and the oscillators, references and UV/OV supply monitors are

operating within their specified range. As in REFUP State, the

OCxADC are set into operation if OCEN of CFGA register (see

Table 69) is set to 1.

Several ADCs can be active in parallel and can be triggered

repeatedly and/or operated continuously. Valid IxADC

conversion results are available once the ADC initialization

phase has completed, which is indicated by I1CAL and I2CAL

of STAT register (see Table 75) being set to 1.

ISOSPI STATES

The ADBMS2950B has two isoSPI ports for daisy-chain

communication: Port A and Port B.

READY State

The isoSPI interface is in the READY state whenever the core

state machine is either in the STANDBY, REFUP, or MEASURE

state, and there is no activity on the interface. In the READY

state, the isoSPI port(s) are ready for communication. There is

no need to wake up the isoSPI interface. Upon transmitting or

receiving data, the isoSPI interface moves to the ACTIVE state.

ACTIVE State

In the ACTIVE state, the ADBMS2950B is transmitting and/or

receiving data using one or both isoSPI ports. The serial

interface consumes maximum power in this state. The supply

current increases with clock frequency and communication

duty cycle as the density of isoSPI pulses increases and is higher

for read commands because of additional isoSPI return pulses

that are not generated for write commands.

Figure 28. isoSPI Interface State Diagram

POWER CONSUMPTION

The ADBMS2950B is powered by VDD and VREG. The VDD input

supplies the DRIVE output and the GPO high side switches. All

other circuitry is powered by VREG. The VDD pin current

depends on the load on DRIVE and GPO. The VREG pin current

depends on the core state, operation of the ADCs, isoSPI state

and the load on the VREF1P25, OCA and OCB pins. It can be

calculated as follows:

IREG = IREG(CORE,ADC) + IREG(isoSPI) + IREG(VREF1P25) + IREG(OCx)

where:

IREG(CORE,ADC) is the core and ADC supply current, as specified for

the REFUP (OCEN = 0), REFUP (OCEN = 1) and MEASURE

state in Table 12.

IREG(VREF1P25) is the VREF1P25 pin sourcing current.

IREG(OCx) is the sum of the OCA and OCB pin sourcing currents.

The isoSPI supply current IREG(isoSPI) contributes significantly to

the overall VREG current consumption and can be calculated as

follows:

IREG(isoSPI) = DisoSPI × ( RWR × IREG(isoSPI,WR) + (1 − RWR) × IREG(isoSPI,RD))

+ (1 − DisoSPI) × IREG(isoSPI,RDY)

where:

DisoSPI is the isoSPI communication duty cycle.

RWR is the ratio of write commands vs. all commands. The ratio

of read commands is (1 − RWR).

IREG(isoSPI,WR) is the isoSPI active write current (see Table 12,

ISOMD = 1, ACTIVE WRITE).

IREG(isoSPI,RD) is the isoSPI active read current (see Table 12,

ISOMD = 1, ACTIVE READ).

IREG(isoSPI,RDY) is the isoSPI ready current.

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