ADBMS2950BCCSZ datasheet(53/97 Pages) AD

53 / 97 page

Data Sheet

ADBMS2950B

Rev. 0 | Page 53 of 97

Name

Type

Reset

Value

Description

0000000

OC3 output asserted irrespective of measured value.

0000001

OC3 output asserted when |OC3R| ≥ 1.

0000010

OC3 output asserted when |OC3R| ≥ 2.

0000011

OC3 output asserted when |OC3R| ≥ 3.

...

0111111

OC3 output asserted when |OC3R| ≥ 63.

1xxxxxx

OC3 output is deasserted. CLRO command clears the OC3R result register to 10000000.

OCDGT

OC1ADC, OC2ADC, OC3ADC Overcurrent Deglitch Time Threshold.

1oo1. Deglitching disabled. OC event progresses directly to the output. No extra latency.

2oo3. OC event progresses when two out of three subsequent samples are above threshold.

4oo8. OC event progresses when four out of eight subsequent samples are above threshold.

7oo8. OC event progresses when seven out of eight subsequent samples are above threshold.

OCMODE

OCA and OCB Output Mode Control.

OCA and OCB outputs are disabled and in high-impedance state.

OCA and OCB outputs are enabled in PWM1 mode.

OCA and OCB outputs are enabled in PWM2 mode.

OCA and OCB outputs are enabled in static mode.

OCAX

OCA Output XOR Inverter.

OCA Output is not inverted. Active high. PWM period starts with high pulse.

OCA Output is inverted. Active low. PWM period starts with low pulse.

OCBX

OCB Output XOR Inverter.

OCB Output is not inverted. Active high. PWM period starts with high pulse.

OCB Output is inverted. Active low. PWM period starts with low pulse.

OCOD

OCA and OCB Output Open drain Enable. OCOD is ignored when OCMODE is set to 0b00.

OCA and OCB operate in push-pull mode and are pushed to VREG for logic level 1 or pulled to GND for logic level 0.

OCA and OCB operate in open-drain mode and are high-impedance for logic level 1 or pulled to GND for logic level 0. External

pull-up resistor required in this mode.

OCDP

OCA and OCB Output Pin reduced safety interval from OCEN rising edge to OCA and OCB output drivers activation.

Normal safety interval of 10 OCxADC conversion cycles.

Reduced safety interval of 3 OCxADC conversion cycles.

DIAGSEL

000

IxADC and VBxADC Diagnostic Select for ADI1 and ADI2 diagnostic measurement commands.

000

No current injection.

IxADC convert regular inputs (IxA vs. IxB).

VBxADC convert regular inputs (VBATx pins depending on VBxMUX setting).

001

Current injected into IxA, VBATx pins.

IxADC convert regular inputs.

VBxADC convert regular inputs.

010

Current injected into IxB, SGND pins.

IxADC convert regular inputs.

VBxADC convert regular inputs.

011

Current injected into SxA pins.

IxADC convert SxA vs. IxA.

VBxADC convert regular inputs.

100

No current injection.

IxADC convert SxA vs. IxA.

VBxADC convert SGND vs. SGND (offset measurement).

101

No current injection.

IxADC and VBxADC convert VDIV.

110

No current injection.

IxADC convert scaled VREF2 version (nominal −0.125V).

VBxADC convert scaled VREF2 version (nominal 2.375V).

111

Current injected into IxB pins.

IxADC convert SxA vs. IxA.

VBxADC convert regular inputs.

GPIO1C

GPIO1 Output Control.

GPIO1 pulls down to GND.

GPIO1 output driver disabled, unless overruled by COMM register.

GPIO2C

GPIO2 Output Control.

GPIO2 pulls down to GND.

GPIO2 output driver disabled, unless overruled by COMM register.

GPIO3C

GPIO3 Output Control.

GPIO3 pulls down to GND.

GPIO3 output driver disabled, unless overruled by COMM register.

GPIO4C

GPIO4 Output Control.

GPIO4 pulls down to GND.

GPIO4 output driver disabled, unless overruled by COMM register.

GPIO2EOC

GPIO2 Toggle on OC1ADC End of Conversion Enable.

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