ADBMS2950BCCSZ datasheet(42/97 Pages) AD

42 / 97 page

ADBMS2950B

Data Sheet

Rev. 0 | Page 42 of 97

Figure 30. VxADC and VBxADC Transfer Function

Figure 31. VxADC and VBxADC Transfer Function Detail

Poll Commands

The simplest method to determine ADC completion is for the

host controller to start an ADC conversion and wait for the

specified conversion time to pass before reading the results. The

ADBMS2950B also allows the use of polling for conversion

completion of ADCs triggered for single-shot measurements.

For the ADCs in continuous mode, the successful polling of the

end of conversion (EOC) is not possible. Any ADC trigger

command (ADI1, ADI2, ADV, and ADX) supports polling by

extending the serial transaction to read the poll data. Four

polling commands allow polling of groups of ADCs after they

have been triggered:

•

PLI1 for I1ADC/VB1ADC

•

PLI2 for I2ADC/VB2ADC

•

PLV for V1ADC/V2ADC

•

PLX for AUX ADC

Additionally, the global Poll command PLADC allows to poll

for completion of all ADCs in case none of them operate in

continuous mode.

Table 59. PLI1, PLI2, PLV, PLX Command Codes

Name

Type

BIT

Description

PLI1

CMD

Poll I1ADC and VB1ADC conversion completion

(ADBMS6830B: PLCADC).

PLI2

CMD

Poll I2ADC and VB2ADC conversion completion

(ADBMS6830B: PLSADC).

PLV

CMD

Poll V1ADC and V2ADC conversion completion (ADBMS6830B:

PLAUX1).

PLX

CMD

Poll AUX ADC conversion completion (ADBMS6830B: PLAUX2).

PLADC

CMD

Poll IxADC, VBxADC, VxADC, AUX ADC conversion completion

(ADBMS6830B: PLADC).

ADC Total Measurement Error

The IxADCs each have a resolution of 18 bits, but their

precision is limited by random noise. At their 1 ms conversion

time, the random noise follows a normal distribution with a

standard deviation of 1.6 µVRMS. The precision can be improved

by accumulating (averaging) multiple conversions. For every

doubling of the number of conversions that are accumulated,

the precision improves by a factor √2.

Figure 32 shows the precision for a zero-input signal. The

graph shows both the standard deviations as well as ±3.5σ

limits, which correspond to a 99.98% confidence interval. As

the number of accumulated conversions is increased, the

precision improves and settles towards the accuracy. The

accuracy of the IxADCs is determined by their offset, gain

error, and nonlinearity. At zero-input, only the offset is relevant.

The precision shown in Figure 32 equals the TME for such an

input signal.

The accumulation or averaging can be performed externally or

by using the programmable on-chip accumulators. The

resolution of the IxACC registers is a function of ACCN. The

resolution of the 1 ms data in the I1 and I2 registers is fixed to

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