AM62A7 datasheet(216/238 Pages) TI1

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9 Applications, Implementation, and Layout

Note

Information in the following applications sections is not part of the TI component specification,

and TI does not warrant its accuracy or completeness. TI’s customers are responsible for

determining suitability of components for their purposes, as well as validating and testing their design

implementation to confirm system functionality.

9.1 Device Connection and Layout Fundamentals

9.1.1 Power Supply

9.1.1.1 Power Supply Designs

The Power Management IC (PMIC) recommended for the AM62Ax processor and its principal peripherals, along

with its operational details can be found in the PMIC Solution for AM62Ax application note.

List of benefits when using the recommended PMIC to power AM62Ax:

• Cost and space optimized solution specifically designed to power the AM62Ax processor

• Full device performance entitlement as validated on TI Evaluation boards

• Factory programmed configurations support power rail load steps, supply voltage accuracies, and maximum

load currents with margins

• Factory programmed configuration to support LPDDR4 memory

• Meets all AM62Ax voltage and sequencing requirements, refer to Section 7.4, Recommended Operating

Conditions and Section 7.10.2.2, Power Supply Sequencing

9.1.1.2 Power Distribution Network Implementation Guidance

The Sitara Processor Power Distribution Networks: Implementation and Analysis provides guidance for

successful implementation of the power distribution network. This includes PCB stackup guidance as well as

guidance for optimizing the selection and placement of the decoupling capacitors. TI only supports designs that

follow the board design guidelines contained in the application report.

9.1.2 External Oscillator

For more information about External Oscillators, see the Clock Specifications section.

9.1.3 JTAG, EMU, and TRACE

Texas Instruments supports a variety of eXtended Development System (XDS) JTAG controllers with various

debug capabilities beyond only JTAG support. A summary of this information is available in the XDS Target

Connection Guide.

For recommendations on JTAG, EMU, and TRACE routing, see the Emulation and Trace Headers Technical

Reference Manual

9.1.4 Unused Pins

For more information about Unused Pins, see Section 6.4, Pin Connectivity Requirements

AM62A7, AM62A7-Q1, AM62A3, AM62A3-Q1

SPRSP77A – MARCH 2023 – REVISED AUGUST 2023

www.ti.com

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