AM62A7 datasheet(3/238 Pages) TI1

3 / 238 page

Media and Data Storage:

• 3x Multi-Media Card/Secure Digital® (MMC/SD®/

SDIO) interface

– 1x 8-bit eMMC interface up to HS200 speed

– 2x 4-bit SD/SDIO interface up to UHS-I

– Compliant with eMMC 5.1, SD 3.0, and SDIO

Version 3.0

• 1× General-Purpose Memory Controller (GPMC)

up to 133 MHz

– Flexible 8- and 16-bit Asynchronous Memory

Interface with up to four Chip (22-bit address)

Selects (NAND, NOR, Muxed-NOR, and

SRAM)

– Uses BCH code to support 4-, 8-, or 16-bit ECC

– Uses Hamming code to support 1-bit ECC

– Error Locator Module (ELM)

• Used with the GPMC to locate addresses

of data errors from syndrome polynomials

generated using a BCH algorithm

• Supports 4-, 8-, and 16-bit per 512-

Byte block error location based on BCH

algorithms

• OSPI/QSPI with DDR / SDR support

– Support for Serial NAND and Serial NOR Flash

devices

– 4GBytes memory address support

– XIP mode with optional on-the-fly encryption

Power Management:

• Low-power modes supported by Device/Power

Manager

– Partial IO support for CAN/GPIO/UART wakeup

– DeepSleep : I/O + DDR (suspend to RAM)

– DeepSleep

– MCU Only

– Standby

– Dynamic frequency scaling for Cortex-A53

Boot Options:

• UART

• I2C EEPROM

• OSPI/QSPI Flash

• GPMC NOR/NAND Flash

• Serial NAND Flash

• SD Card

• eMMC

• USB (host) boot from Mass Storage device

• USB (device) boot from external host (DFU mode)

• Ethernet

Technology / Package:

• 16-nm FinFET technology

• 18 mm x 18 mm, 0.8-mm pitch full-array, 484-pin

FCBGA (AMB)

www.ti.com

AM62A7, AM62A7-Q1, AM62A3, AM62A3-Q1

SPRSP77A – MARCH 2023 – REVISED AUGUST 2023

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Product Folder Links: AM62A7 AM62A7-Q1 AM62A3 AM62A3-Q1

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