VT8235 datasheet(97/145 Pages) VIA

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VT8235 V-Link South Bridge

Revision 1.22 October 24, 2002

-91-

I/O Space System Management Bus Registers

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I/O Offset 02h – SMBus Host Control.............................RW

Reserved

........................................ always reads 0

Start

........................................ always reads 0

Writing 0 has no effect .......................... default

Start Execution of Command

Writing a 1 to this bit causes the SMBus

controller host interface to initiate execution of

the command programmed in the SMBus

Command Protocol field (bits 4-2).

All

necessary registers should be programmed

prior to writing a 1 to this bit. The Host Busy

bit (SMBus Host Status Register bit-0) can be

used to identify when the SMBus controller

has completed command execution.

5-2

SMBus Command Protocol

Selects the type of command the SMBus host

controller will execute.

Reads or Writes are

determined by Rx04[0].

0000 Quick default

0001 Byte

0010 Byte Data

0011 Word Data

0100 Process Call

0101 Block

0110 I2C with 10-bit Address

0111 -reserved-

10xx -reserved-

1100 I2C Process Call

1101 I2C Block

1110 I2C with 7-bit Address

1111 Universal

Kill Transaction in Progress

Normal host controller operation........... default

Stop host transaction currently in progress.

Setting this bit also sets the FAILED status bit

(Host Status bit-4) and asserts the interrupt

selected by the SMB Interrupt Select bit

(Function

SMBus

Host

Configuration

Interrupt Enable

Disable interrupt generation .................. default

Enable generation of interrupts on completion

of the current host transaction.

I/O Offset 03h – SMBus Host Command........................ RW

7-0

SMBUS Host Command

..........................default = 0

This field contains the data transmitted in the

command field of the SMBus host transaction.

I/O Offset 04h – SMBus Host Address............................ RW

The contents of this register are transmitted in the address

field of the SMBus host transaction.

7-1

SMBUS Address

.......................................default = 0

This field contains the 7-bit address of the targeted

slave device.

SMBUS Read or Write

Execute a WRITE command ................. default

Execute a READ command

I/O Offset 05h – SMBus Host Data 0 .............................. RW

The contents of this register are transmitted in the Data 0 field

of SMBus host transaction writes. On reads, Data 0 bytes are

stored here.

7-0

SMBUS Data 0

..........................................default = 0

For Block Write commands, this field is programmed

with the block transfer count (a value between 1 and

32). Counts of 0 or greater than 32 are undefined.

For Block Read commands, the count received from

the SMBus device is stored here.

I/O Offset 06h – SMBus Host Data 1 .............................. RW

The contents of this register are transmitted in the Data 1 field

of SMBus host transaction writes. On reads, Data 1 bytes are

stored here.

7-0

SMBUS Data 1

..........................................default = 0

I/O Offset 07h – SMBus Block Data................................ RW

Reads and writes to this register are used to access the 32-byte

block data storage array. An internal index pointer is used to

address the array. It is reset to 0 by reads of the SMBus Host

Control register (I/O Offset 2) and incremented automatically

by each access to this register. The transfer of block data into

(read) or out of (write) this storage array during an SMBus

transaction always starts at index address 0.

7-0

SMBUS Block Data

..................................default = 0

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