VT8235 datasheet(53/145 Pages) VIA

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VT8235 V-Link South Bridge

Revision 1.22 October 24, 2002

-47-

Device 16 Function 0 USB UHCI Registers for Ports 0-1

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USB-Specific Configuration Registers

Offset 40 - Miscellaneous Control 1 (40h) .......................RW

Reserved

........................................ always reads 0

Babble Option

This bit controls whether the port is disabled when

EOF (End-Of-Frame) babble occurs.

Babble is

unexpected bus activity that persists into the EOF

interval. When this bit is 0, the port with the EOF

babble is disabled. When it is 1, it is not disabled

Automatically disable babbled port when EOF

babble occurs

Don’t disable babbled port ....................default

PCI Parity Check

Disable .................................................. default

Enable

Frame Interval Select

1 msec frame time ................................. default

0.1 msec frame time

USB Data Length Option

Support TD length up to 1280............... default

Support TD length up to 1023

(TD = Transfer Descriptor)

Improve FIFO Latency

Improve latency if packet size < 64 bytes ... def

Disable improvement

DMA Option

Enhanced performance (8 DW burst access

with better FIFO latency) ...................... default

Normal performance (16 DW burst access

with normal FIFO latency)

Reserved

........................................ always reads 0

Offset 41 - Miscellaneous Control 2 (10h)....................... RW

USB 1.1 Improvement for EOP

This bit controls whether USB Specification 1.1 or

1.0 is followed when a stuffing error occurs before an

EOP (End-Of-Packet). A stuffing error results when

the receiver sees seven consecutive ones in a packet.

Under USB specification 1.1, when this occurs in the

interval just before an EOP, the receiver will accept

the packet. Under USB specification 1.0, the packet

is ignored.

USB Spec 1.1 Compliant (packet accepted) def

USB Spec 1.0 Compliant (packet ignored)

6-3

Reserved (Do Not Program)

....................default = 0

Trap Option

Under the UHCI spec, port 60 / 64 is trapped only

when its corresponding enable bits are set. When this

bit is set, trap can be set without checking the enable

bits.

Set trap 60/64 status bits only when trap 60/64

enable bits are set................................... default

Set trap 60/64 status bits without checking

enable bits

A20Gate Pass Through Option

This bit controls whether the A20Gate pass-through

sequence (as defined in UHCI) is followed.

The

A20Gate sequence consists of 4 commands. When

this bit is 0, the 4-command sequence is followed.

When this bit is 1, the last command (write FFh to

port 64) is skipped.

A20GATE Pass-through command sequence

as defined in UHCI ................................ default

Last command skipped

Reserved (Do Not Program)

....................default = 0

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