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VT8235 датащи(PDF) 60 Page - VIA Technologies, Inc.

номер детали VT8235
подробное описание детали  V-LINK CLIENT HIGHLY INTEGRATED SOUTH BRIDGE
PDF  145 Pages
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производитель  VIA [VIA Technologies, Inc.]
домашняя страница  https://www.viatech.com/en/
Logo VIA - VIA Technologies, Inc.

VT8235 датащи(HTML) 60 Page - VIA Technologies, Inc.

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VT8235 V-Link South Bridge
Revision 1.22 October 24, 2002
-54-
Device 16 Function 2 USB UHCI Registers for Ports 4-5
Urpu‚y‚tvr†ÃDp
XrÃ8‚rp‡
Device 16 Function 2 Registers - USB 1.1 UHCI Ports 4-5
This Universal Serial Bus host controller interface is fully
compatible with UHCI specification v1.1. There are two sets
of software accessible registers: PCI configuration registers
and USB I/O registers. The PCI configuration registers are
located in the Device 16 Function 0 PCI configuration space
of the VT8235. The USB I/O registers are defined in UHCI
specification v1.1. The registers in this function control USB
ports 4-5 (see function 0 for ports 0-1 and function 1 for ports
2-3).
PCI Configuration Space Header
Offset 1-0 - Vendor ID (1106h)......................................... RO
7-0
Vendor ID
................. (1106h = VIA Technologies)
Offset 3-2 - Device ID (3038h) .......................................... RO
7-0
Device ID
....... (3038h = VT8235 USB Controller)
Offset 5-4 - Command (0000h) .........................................RW
15-8 Reserved
........................................ always reads 0
7
Reserved
(address stepping)........................ fixed at 0
6
Reserved
(parity error response) ................. fixed at 0
5
Reserved
(VGA palette snoop) ................... fixed at 0
4
Memory Write and Invalidate
. default=0 (disabled)
3
Reserved
(special cycle monitoring) ........... fixed at 0
2
Bus Master
............................... default=0 (disabled)
1
Memory Space
........................... default=0 (disabled)
0
I/O Space
............................... default=0 (disabled)
Offset 7-6 - Status (0210h) .............................................RWC
15
Reserved
(detected parity error).......... always reads 0
14
Signalled System Error
.............................. default=0
13
Received Master Abort
.............................. default=0
12
Received Target Abort
............................... default=0
11
Signalled Target Abort
.............................. default=0
10-9 DEVSEL# Timing
00 Fast
01 Medium ......................................default (fixed)
10 Slow
11 Reserved
8-0
Reserved
.............................. fixed 10h (PCI PMI)
Offset 8 - Revision ID (nnh) .............................................. RO
7-0
Silicon Revision Code (0 indicates first silicon)
Offset 9 - Programming Interface (00h) .......................... RO
Offset A - Sub Class Code (03h=USB Controller) .......... RO
Offset B - Base Class Code (0Ch=Serial Bus Controller)RO
Offset D - Latency Timer (16h) ....................................... RW
Offset 23-20 - USB I/O Register Base Address............... RW
31-16 Reserved
........................................always reads 0
15-5 USB I/O Register Base Address.
Port Address for
the base of the 32-byte USB I/O Register block,
corresponding to AD[15:5]
4-0
00001b
Offset 2D-2C - Sub Vendor ID (1106h).......................... RO†
Offset 2F-2E - Sub Device ID (3038h) ............................ RO†
† RW if Rx42[4] = 1.
Offset 34 - Power Management Capabilities (80h) ........ RW
Offset 3C - Interrupt Line (00h) ...................................... RW
7-4
Reserved
........................................always reads 0
3-0
USB Interrupt Routing
0000 Disabled ................................................. default
0001 IRQ1
0010 Reserved
0011 IRQ3
0100 IRQ4
0101 IRQ5
0110 IRQ6
0111 IRQ7
1000 IRQ8
1001 IRQ9
1010 IRQ10
1011 IRQ11
1100 IRQ12
1101 IRQ13
1110 IRQ14
1111 Disabled
Offset 3D - Interrupt Pin (03h) ......................................... RO
7-0
Interrupt Pin
.......................... default = 03h (INTC#)



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