VT8235 datasheet(85/145 Pages) VIA

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VT8235 V-Link South Bridge

Revision 1.22 October 24, 2002

-79-

Device 17 Function 0 Power Management Registers

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System Management Bus-Specific Configuration Registers

Offset D1-D0 – SMBus I/O Base ......................................RW

15-4 I/O Base (16-byte I/O space)

............... default = 00h

3-0

Fixed

................................ always reads 0001b

Offset D2 – SMBus Host Configuration ..........................RW

7-4

Reserved

........................................ always reads 0

SMBus Interrupt Type

SMI

.................................................... default

SCI

Reserved

........................................ always reads 0

SMBus Interrupt Enable

Disable SCI / SMI ................................. default

Enable SCI / SMI

SMBus Host Controller Enable

Disable SMB controller functions ......... default

Enable SMB controller functions

Offset D3 – SMBus Host Slave Command ......................RW

7-0

SMBus Host Slave Command Code

......... default=0

Offset D4 – SMBus Slave Address for Port 1..................RW

7-1

SMBus Slave Address for Port 1

............... default=0

Read / Write for Shadow Port 1

Offset D5 – SMBus Slave Address for Port 2..................RW

7-1

SMBus Slave Address for Port 2

............... default=0

Read / Write for Shadow Port 2

Offset D6 – SMBus Revision ID ....................................... RO

7-0

SMBus Revision Code

SMB GPIO Slave Command Codes

SMBus Command Code 0 – GPIO Slave Input Port ...... RO

7-0

Input Data

...................................... default per pins

Reflects the incoming logic levels of the pins,

regardless of whether the pin is defined as an input or

an output. Writes to this register have no effect.

SMBus Command Code 1 – GPIO Slave Output Port .. RW

7-0

Output Data

..............................................default = 0

Controls the levels of the GPIO output pins defined

as outputs. Bit values in this register have no effect

on pins defined as inputs. Reads from this register

reflect the saved value last written, not the actual pin

value.

SMBus Cmd Code 2 – GPIO Slave Polarity Inversion.. RW

7-0

Polarity Inversion

.................................default = 0Fh

This register enables polarity inversion of pins

defined as inputs by Command Code 3.

Corresponding pin’s polarity unchanged

Corresponding pin’s polarity inverted

SMBus Cmd Code 3 – GPIO Slave I/O Configuration.. RW

7-0

Input / Output Configuration

........... default = 0FFh

This register configures the directions of the I/O pins.

Corresponding pin is an output

Corresponding pin is an input ............... default

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