DSP56857 datasheet(111/662 Pages) FREESCALE

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Features

System Integration Module (SIM), Rev. 4

Freescale Semiconductor

4-3

4.1 Introduction

The System Integration Module (SIM) is responsible for several system control functions

including:

•

Clock generation

•

Reset generation

•

Power mode control

•

Boot mode control

•

Memory map control

•

External I/O configuration

•

Software control

4.2 Features

The following list contains distinctions of SIM:

•

Five system bus clocks with pipeline hold-off support

– Data RAM clock with hold-off control

– IPBus Interface clock with hold-off control

– System external memory interface four-phase clock with hold-off control

– 56800E core system clock

– General purpose clock (both standard and inverted versions)

•

Three system clocks for non pipelined interfaces

– PCLK clock for 56800E core

– NCLK clock for 56800E core

– A continuously running system clock

•

A peripheral bus (IPBus) clock, both on standard and inverted versions

•

An external clock output with disable

•

A core stall control used to stall the 56800E core system clock for DMA mastership

•

A peripheral bus clock phase indicator

•

Three power modes to control power utilization:

– Stop mode shuts down the 56800E core, system clocks, and the peripheral clock. Stop

mode entry can optionally disable PLL and Oscillator providing a choice of lower power

vs. a faster restart.

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