PC97307 datasheet(111/218 Pages) NSC

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Parallel Port (Logical Device 4)

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6.0

Parallel Port (Logical Device 4)

The Parallel Port is a communications device that transfers

parallel data between the system and an external device.

Originally designed to output data to an external printer, the

use of this port has grown to include bidirectional communi-

cations, increased data rates and additional applications

(such as network adaptors).

6.1

PARALLEL PORT CONFIGURATION

The part offers a wide range of Parallel Port configurations.

It utilizes the most advanced protocols in current use, while

maintaining full backward compatibility to support existing

hardware and software. It supports two Standard Parallel

Port (SPP) modes of operation for parallel printer ports (as

found in the IBM PC-AT, PS/2 and Centronics systems),

two Enhanced Parallel Port (EPP) modes of operation, and

one Extended Capabilities Port (ECP) mode. This versatility

is achieved by user software control of the mode in which

the device functions.

The IEEE 1284 standard establishes a widely accepted

handshake and transfer protocol that ensures transfer data

integrity. This parallel interface fully supports the IEEE 1284

standard of parallel communications, in both Legacy and

Plug and Play configurations, in all modes except the EPP

revision 1.7 mode described in the next section.

6.1.1

Parallel Port Operation Modes

The part supports Standard Parallel Port (SPP), Enhanced

Parallel Port (EPP) and Extended Capabilities Port (ECP)

configurations.

• In the Standard Parallel Port (SPP) configuration, data

rates of several hundred bytes per second are

achieved. This configuration supports the following op-

eration modes:

— In SPP Compatible mode the port is write-only (for

data). Data transfers are software-controlled and

are accompanied by status and control handshake

signals.

— PP FIFO mode enhances SPP Compatible mode by

the addition of an output data FIFO, and operates as

a state-machine instead of software-controlled oper-

ation.

— In SPP Extended mode, the parallel port becomes a

read/write port, that can transfer a full data byte in ei-

ther direction.

• The Enhanced Parallel Port (EPP) configuration sup-

ports two modes that offer higher bi-directional through-

put and more efficient hardware-based handling.

— The EPP revision 1.7 mode lacks a comprehensive

handshaking scheme to ensure data transfer integ-

rity between communicating devices with dissimilar

data rates. This is the only mode that does not meet

the requirements of the IEEE 1284 standard hand-

shake and transfer protocol.

— EPP revision 1.9 mode offers data transfer enhance-

ment, while meeting the IEEE 1284 standard.

• The Extended Capabilities Port (ECP) configuration ex-

tends the port capabilities beyond EPP modes by add-

ing a bi-directional 16-level FIFO with threshold

interrupts, for PIO and DMA data transfer, including de-

mand DMA operation. In this mode, the device becomes

a hardware state-machine with highly efficient data

transfer control by hardware in real-time.

The part enters the ECP mode by default after reset.

The ECP configuration supports several modes that are

determined by bits 7-5 of the ECP Extended Control

describes these modes in detail. The ECR register is de-

scribed in Section 6.5.12 on page 124.

6.1.2

Configuring Operation Modes

The operation mode of the parallel port is determined by

configuration bits that are controlled by software. If ECP

mode is set upon initial system configuration, the operation

mode may also be changed during run-time.

• Configuration at System Initialization (Static) - The

parallel port operation mode is determined at initial sys-

tem configuration by bits 7-4 of the SuperI/O Parallel

Port Configuration register at index F0h of logical device

4. See Section 2.7.1 on page 37.

• Configuration at System Initialization with Run-

Time Reconfiguration (Dynamic) - The parallel port

operation mode is initially ECP, but may be changed by

additional mode selection bits if bit 4 of the SuperI/O

Parallel Port Configuration register at index F0h of logi-

cal device 4 is 1, and bits 7-5 of the same register are

110 or 111.

In this case, the operation mode is determined by bits 7-

5 of the parallel port Extended Control register (ECR) at

parallel port base address + 402h and by bits 7 and 4 of

the Control2 register at second level offset 2. These reg-

isters are accessed via the internal ECP Mode Index

and Data registers at parallel port base address + 403

and parallel port base address + 404h, respectively.

Table 6-1 shows how to configure the parallel port for the

different operation modes.

Table 2-4 on page 26 shows how to allocate a range for the

base address of the parallel port for each mode. Parallel

port address decoding is described in Chapter 2.2.2 on

page 25.

The parallel port supports Plug and Play operation. Its inter-

rupt can be routed on one of the following ISA interrupts:

IRQ1 to IRQ15 except for IRQ 2 and 13. Its DMA signals

can be routed to one of three 8-bit ISA DMA channels. See

Section 6.5.19 on page 127.

The parallel port device is activated by setting bit 4 of the

system Function Enable Register 1 (FER1) to 1. See Sec-

tion 9.2.3 on page 173.

6.1.3

Output Pin Protection

The parallel port output pins are protected against potential

damage from connecting an unpowered port to a powered-

up printer.

6.2

STANDARD PARALLEL PORT (SPP) MODES

Compatible SPP mode is a data write-only mode that out-

puts data to a parallel printer, using handshake bits, under

software control.

In SPP Extended mode, parallel data transfer is bi-direc-

tional. Table 6-12 on page 134 lists the output signals for

the standard 25-pin, D-type connector. Table 6-2 lists the

reset states for handshake output pins in this mode.

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