UCS81003 datasheet(100/108 Pages) MICROCHIP

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UCS81003

DS20005334A-page 100

 2014 Microchip Technology Inc.

11.3

Stand-Alone Operating Mode

Stand-Alone mode allows the UCS81003 to operate

without active SMBus/I2C communications. Stand-

Alone mode can be enabled by connecting a pull-down

resistor

greater

equal

47 k

 on the

COMM_SEL/ILIM pin as shown in Table 11-1.

When the device is configured to operate in Stand-

Alone mode, the fault handling and Attach Detection

controls are determined via the LATCH and S0 pins as

shown in Table 11-10.

In the Stand-Alone operating mode, communications

from and to the UCS81003 are limited to the PWR_EN,

EM_EN, M2, M1, ALERT# and A_DET# pins.

Note:

If it is necessary to connect the S0 or

LATCH pins to VDD via a pull-up resistor,

the pull-up resistor value should be

100 k

 in order to guarantee V

specification. Similarly, if it is necessary to

connect the S0 or LATCH pins to GND via

a pull-down resistor, the pull-down resistor

value should be 100 k

 in order to

guarantee VIL specification.

TABLE 11-10: STAND-ALONE FAULT AND ATTACH DETECTION SELECTION

Latch Pin

S0 Pin

Command

Low

No Attach Detection. Auto-Recovery upon error detection.

Low

High

Attach Detection in the Detect power state. Auto-Recovery upon error detection.

High

Low

No Attach Detection. Error states are Latched and require host to change

PWR_EN control to recover from Error state.

High

Attach Detection in the Detect power state. Error states are Latched and

require host to change PWR_EN control to recover from Error state.

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