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UCS81003 датащи(PDF) 38 Page - Microchip Technology |
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UCS81003 датащи(HTML) 38 Page - Microchip Technology |
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38 / 108 page ![]() UCS81003 DS20005334A-page 38 2014 Microchip Technology Inc. 7.5 Fault Handling Mechanism The UCS81003 has two modes for handling faults: • Latch (latch-upon-fault) • Auto-Recovery (automatically attempt to restore the Active power state after a fault occurs). If the SMBus is actively utilized, Auto-Recovery Fault Handling is the default error handler as determined by the LATCHS bit (see Section 10.4.3 “Switch Configuration Register”). Otherwise, the fault handling mechanism used depends on the state of the LATCH pin. Faults include overcurrent, overvoltage (on VS), undervoltage (on VBUS), back-voltage (VBUS to VS, or VBUS to VDD), discharge error and maximum allowable internal die temperature (TTSD) exceeded (see Section 5.1.5 “Error State Operation”). 7.5.1 AUTO-RECOVERY FAULT HANDLING When the LATCH control is low, Auto-Recovery Fault Handling is used. When an error condition is detected, the UCS81003 will immediately enter the Error state and assert the ALERT# pin (see Section 5.1.5 “Error State Operation”). Independently from the host controller, the UCS81003 will wait a preset time (tCYCLE), check error conditions (tTST) and restore Active operation if the error condition(s) no longer exist. If all other conditions that may cause the ALERT# pin to be asserted have been removed, the ALERT# pin will be released. FIGURE 7-1: Error Recovery Timing (Short Circuit Example). 7.5.2 LATCHED FAULT HANDLING When the LATCH control is high, Latch Fault Handling is used. When an error condition is detected, the UCS81003 will enter the Error power state and assert the ALERT# pin. Upon command from the host controller (by toggling the PWR_EN control from enabled to disabled or by clearing the ERR bit via SMBus), the UCS81003 will check error conditions once and restore Active operation if error conditions no longer exist. If an error condition still exists, the host controller is required to issue the command again to check error conditions. tRST VBUS IBUS SHORT applied. ITST tDISCHARGE ITST VTEST Short Detected. VBUS discharged. Enter Error state. Check short condition. Short still present. Return to Error State. Wait tCYCLE. Wait tCYCLE. Check short condition. Short removed. Return to normal operation. tCYCLE tCYCLE tRST |
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