UCS81003 datasheet(59/108 Pages) MICROCHIP

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 2014 Microchip Technology Inc.

DS20005334A-page 59

UCS81003

10.4.5

HIGH-SPEED SWITCH

CONFIGURATION REGISTER

The contents of this register are retained in Sleep.

U-x

R/W-1

R/W-0

R/W-1

R/W-0

—

RESERVED

HSW_CUST

HSW_CDP

HSW_DET

HSW_DCE

bit 7

bit 0

Legend:

R = Readable bit

W = Writable bit

U = Unimplemented bit

-n = Value at POR

‘1’ = Bit is set

‘0’ = Bit is cleared

x = Bit is unknown

bit 7-5

Unimplemented

bit 4

RESERVED: Do not change.

bit 3

HSW_CUST: Enables the USB high-speed data switch to be active during the Custom handshake. This

control is checked at the beginning of charger emulation. Therefore, changing this control during emula-

tion will have no immediate effect. Upon restarting charger emulation (as a result of the EM_RETRY bit

being set, a Removal Detection event, or change of emulation controls), the high-speed switch will close.

The USB high-speed data switch is enabled while the Custom charger emulation profile is applied.

Also, if the Custom charger emulation profile is accepted during the Dedicated Charger Emulation

Cycle, the high-speed switch will stay closed.

The USB high-speed data switch is disabled while the Custom charger emulation profile is applied.

bit 2

HSW_CDP: Enables the USB high-speed data switch to be active during the CDP handshake. This con-

trol is checked at the beginning of charger emulation. Therefore, changing this control during emulation

will have no immediate effect. Upon restarting charger emulation (as a result of a Removal Detection

event or change of emulation controls), the high-speed switch will close.

The USB high-speed data switch is enabled during the CDP handshake.

The USB high-speed data switch is disabled during the CDP handshake.

bit 1

HSW_DET: Enables the USB high-speed data switch to be active during the Detect power state. If the

S0 control is set to ‘0’, this bit is ignored.

The USB high-speed data switch will be closed during the Detect power state.

The USB high-speed data switch is open during the Detect power state.

bit 0

HSW_DCE: Enables the USB high-speed data switch after the DCP charger emulation profile or one of

the Legacy charger emulation profiles was accepted during the DCE Cycle and the portable device is

charging. This bit is ignored if the UCS81003 is not in the Active state. This bit will not cause the high-

speed switch to be closed during emulation when the DCP and Legacy profiles are applied, only after

the DCP or a Legacy charger emulation profile has been accepted.

The USB high-speed data switch will be closed.

= The USB high-speed data switch will be open.

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