PC87413 datasheet(156/257 Pages) NSC

156 / 257 page

8.0 Real-Time Clock (RTC) (Continued)

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156

Revision1.2

8.3.14

RTC Control Register B (CRB)

Power Well:VPP

Location: Index 0Bh

Type:

R/W

Bit

7654

Name

SETMODE

PIE

AIE

UIE

Reserved

DATMODE

HRMODE

DSVMODE

Reset

0000

Bit

Description

SETMODE (Set Mode). This bit is reset at VPP power-up reset only.

0: Timing updates occur normally

1: User copy of time is frozen, allowing the time registers to be accessed whether or not an update occurs

PIE (Periodic Interrupt Enable). Bits 3-0 of the CRA register determine the rate at which this interrupt is

generated. It is cleared to 0 on RTC reset (i.e., VSB Power-Up reset) or when RTC is disabled.

0: Disabled

1: Enabled

AIE (Alarm Interrupt Enable). This interrupt is generated immediately after a time update in which the seconds,

minutes, hours, date and month time equal their respective alarm counterparts. It is cleared to 0 as long as bit

7 of the CRD register reads 0.

0: Disabled

1: Enabled

UIE (Update Ended Interrupt Enable). This interrupt is generated when an update occurs. It is cleared to 0 on

RTC reset (i.e., VSB Power-Up reset) or when the RTC is disabled.

0: Disabled

1: Enabled

Reserved. This bit is deﬁned as “Square Wave Enable” by MC146818 and is not supported by the RTC. It is

always read as 0.

DATMODE (Data Mode). This bit is reset at VPP power-up reset only.

0: BCD format enabled

1: Binary format enabled

HRMODE (Hour Mode). This bit is reset at VPP power-up reset only.

0: 12-hour format enabled

1: 24-hour format enabled

DSVMODE (Daylight Saving). This bit is reset at VPP power-up reset only.

0: Disabled

1: Enabled:

In the spring, time advances from 1:59:59 AM to 3:00:00 AM on the first Sunday in April.

In the fall, time returns from 1:59:59 AM to 1:00:00 AM on the last Sunday in October.

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