COP888EB datasheet(14/75 Pages) NSC

14 / 75 page

Functional Description (Continued)

The RESET signal goes directly to the

HALT latch to restart a halted chip.

When using external reset, the external RC network shown

Figure 6 should be used to ensure that the RESET pin is

held low until the power supply to the chip stabilizes. Under

no circumstances should the RESET pin be allowed to float.

Oscillator Circuits

The chip can be driven by a clock input on the CKI input pin

which can be between DC and 10 MHz. The CKO output

clock is on pin G7. The CKI input frequency is divided by 10

to produce the instruction cycle clock (1/t

c).

Figure 7 shows the Crystal diagram.

CRYSTAL OSCILLATOR

CKI and CKO can be connected to make a closed loop crys-

tal (or resonator) controlled oscillator.

Table 1 shows the component values required for various

standard crystal values.

TABLE 1. Crystal Oscillator Configuration, T

A = 25˚C

CKI Freq.

Conditions

Ω)(MΩ)

(pF)

(MHz)

30–36

CC =5V

30–36

CC =5V

200

100–150

0.455

CC =5V

Control Registers

CNTRL Register (Address X'00EE)

T1C3

T1C2

T1C1

T1C0

MSEL

IEDG

SL1

SL0

Bit 7

Bit 0

The Timer1 (T1) and MICROWIRE/PLUS control register

contains the following bits:

T1C3

Timer T1 mode control bit

T1C2

Timer T1 mode control bit

T1C1

Timer T1 mode control bit

T1C0

Timer T1 Start/Stop control in timer

modes 1 and 2, T1 Underflow Interrupt

Pending Flag in timer mode 3

MSEL

Selects G5 and G4 as MICROWIRE/PLUS

signals SK and SO respectively

IEDG

External interrupt edge polarity select

(0 = Rising edge, 1 = Falling edge)

SL1 & SL0

Select the MICROWIRE/PLUS clock divide

by (00 = 2, 01 = 4, 1x = 8)

CNTRL Register (Address X'00EE)

T1C3

T1C2

T1C1

T1C0

MSEL

IEDG

SL1

SL0

Bit 7

Bit 0

The Timer1 (T1) and MICROWIRE/PLUS control register

contains the following bits:

T1C3

Timer T1 mode control bit

T1C2

Timer T1 mode control bit

T1C1

Timer T1 mode control bit

T1C0

Timer T1 Start/Stop control in timer

modes 1 and 2, T1 Underflow Interrupt

Pending Flag in timer mode 3

MSEL

Selects G5 and G4 as MICROWIRE/PLUS

signals SK and SO respectively

IEDG

External interrupt edge polarity select

(0 = Rising edge, 1 = Falling edge)

SL1 & SL0

Select the MICROWIRE/PLUS clock divide

by (00 = 2, 01 = 4, 1x = 8)

PSW Register (Address X'00EF)

T1PNDA

T1ENA

EXPND

BUSY

EXEN

GIE

Bit 7

Bit 0

The PSW register contains the following select bits:

Half Carry Flag

Carry Flag

T1PNDA Timer T1 Interrupt Pending Flag (Autoreload

RA in mode 1, T1 Underflow in Mode 2, T1A

capture edge in mode 3)

T1ENA

Timer T1 Interrupt Enable for Timer Underflow

or T1A Input capture edge

EXPND

External interrupt pending

BUSY

MICROWIRE/PLUS busy shifting flag

EXEN

Enable external interrupt

GIE

Global interrupt enable (enables interrupts)

The Half-Carry flag is also affected by all the instructions that

affect the Carry flag. The SC (Set Carry) and R/C (Reset

Carry) instructions will respectively set or clear both the carry

flags. In addition to the SC and R/C instructions, ADC,

SUBC, RRC and RLC instructions affect the Carry and Half

Carry flags.

ICNTRL Register (Address X'00E8)

Reserved

LPEN

T0PND

T0EN

µWPND

µWEN

T1PNDB

T1ENB

Bit 7

Bit 0

DS012837-7

RC > 5 x Power Supply Rise Time

FIGURE 6. Recommended Reset Circuit

DS012837-8

FIGURE 7. Crystal Oscillator Diagram

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