COP888EB datasheet(60/75 Pages) NSC

60 / 75 page

Baud Clock Generation (Continued)

write registers shown in

Figure 47. Note that the 11-bit Baud

Rate Divisor spills over into the Prescaler Select Register

(PSR). PSR is cleared upon reset.

As shown in

Table 15, a Prescaler Factor of 0 corresponds to

NO CLOCK. NO CLOCK condition is the USART power

down mode where the USART clock is turned off for power

saving purpose. The user must also turn the USART clock

off when a different baud rate is chosen.

The correspondences between the 5-bit Prescaler Select

and Prescaler factors are shown in

Table 15. There are

many ways to calculate the two divisor factors, but one par-

ticularly effective method would be to achieve a 1.8432 MHz

frequency coming out of the first stage. The 1.8432 MHz

prescaler output is then used to drive the software program-

mable baud rate counter to create a x16 clock for the follow-

ing baud rates: 110, 134.5, 150, 300, 600, 1200, 1800, 2400,

3600, 4800, 7200, 9600, 19200 and 38400 (

Table 16). Other

baud rates may be created by using appropriate divisors.

The x16 clock is then divided by 16 to provide the rate for the

serial shift registers of the transmitter and receiver.

TABLE 15. Prescaler Factors

Prescaler

Select

Factor

00000

NO CLOCK

00001

00010

1.5

00011

00100

2.5

00101

00110

3.5

Prescaler

Select

Factor

00111

01000

4.5

01001

01010

5.5

01011

01100

6.5

01101

01110

7.5

01111

10000

8.5

10001

10010

9.5

10011

10100

10.5

10101

10110

11.5

10111

11000

12.5

11001

11010

13.5

11011

11100

14.5

11101

11110

15.5

11111

DS012837-50

FIGURE 46. USART BAUD Clock Generation

DS012837-51

FIGURE 47. USART BAUD Clock Divisor Registers

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