COP888EB datasheet(63/75 Pages) NSC

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WATCHDOG Operation (Continued)

WATCHDOG AND CLOCK MONITOR SUMMARY

The following salient points regarding the COP888 WATCH-

DOG and CLOCK MONITOR should be noted:

•

Both the WATCHDOG and Clock Monitor detector cir-

cuits are inhibited during RESET.

•

Following RESET, the WATCHDOG and CLOCK MONI-

TOR are both enabled, with the WATCHDOG having the

maximum service window selected.

•

The WATCHDOG service window and Clock Monitor

enable/disable option can only be changed once, during

the initial WATCHDOG service following RESET.

•

The initial WATCHDOG service must match the key data

value in the WATCHDOG Service register WDSVR in or-

der to avoid a WATCHDOG error.

•

Subsequent WATCHDOG services must match all three

data fields in WDSVR in order to avoid WATCHDOG er-

rors.

•

The correct key data value cannot be read from the

WATCHDOG Service register WDSVR. Any attempt to

read this key data value of 01100 from WDSVR will read

as key data value of all 0’s.

•

The WATCHDOG detector circuit is inhibited during both

the HALT and IDLE modes.

•

The Clock Monitor detector circuit is active during both

the HALT and IDLE modes. Consequently, the device in-

advertently entering the HALT mode will be detected as a

Clock Monitor error (provided that the Clock Monitor en-

able option has been selected by the program).

•

With the single-pin R/C oscillator mask option selected

and the CLKDLY bit reset, the WATCHDOG service win-

dow will resume following HALT mode from where it left

off before entering the HALT mode.

•

With the crystal oscillator mask option selected, or with

the single-pin R/C oscillator mask option selected and the

CLKDLY bit set, the WATCHDOG service window will be

set to its selected value from WDSVR following HALT.

Consequently, the WATCHDOG should not be serviced

for at least 2048 instruction cycles following HALT, but

must be serviced within the selected window to avoid a

WATCHDOG error.

•

The IDLE timer T0 is not initialized with RESET.

•

The user can sync in to the IDLE counter cycle with an

IDLE counter (T0) interrupt or by monitoring the T0PND

flag. The T0PND flag is set whenever the thirteenth bit of

the IDLE counter toggles (every 4096 instruction cycles).

The user is responsible for resetting the T0PND flag.

•

A hardware WATCHDOG service occurs just as the de-

vice exits the IDLE mode. Consequently, the WATCH-

DOG should not be serviced for at least 2048 instruction

cycles following IDLE, but must be serviced within the se-

lected window to avoid a WATCHDOG error.

•

Following RESET, the initial WATCHDOG service (where

the service window and the CLOCK MONITOR enable/

disable must be selected) may be programmed any-

where within the maximum service window (65,536 in-

struction cycles) initialized by RESET. Note that this initial

WATCHDOG service may be programmed within the inti-

tial 2048 instruction cycles without causing a WATCH-

DOG error.

TABLE 19. WATCHDOG Service Actions

Key

Window

Clock

Action

Data

Monitor

Match

Valid Service: Restart Service Window

Don’t Care

Mismatch

Don’t Care

Error: Generate WATCHDOG Output

Mismatch

Don’t Care

Error: Generate WATCHDOG Output

Don’t Care

Mismatch

Error: Generate WATCHDOG Output

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