PIC17C752-08SLASHCL datasheet(181/328 Pages) MICROCHIP

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DS30289A-page 181

PIC17C7XX

16.1

A/D Acquisition Requirements

For the A/D converter to meet its speciﬁed accuracy,

the charge holding capacitor (CHOLD) must be allowed

to fully charge to the input channel voltage level. The

analog input model is shown in Figure 16-5. The source

impedance (RS) and the internal sampling switch (RSS)

impedance directly affect the time required to charge

the capacitor CHOLD. The sampling switch (RSS)

impedance varies over the device voltage (VDD),

Figure 16-5. The maximum recommended imped-

ance for analog sources is 10 k

Ω. As the impedance

is decreased, the acquisition time may be decreased.

After the analog input channel is selected (changed)

this acquisition must be done before the conversion

can be started.

calculate

the

minimum

acquisition

time,

Equation 16-1 may be used. This equation assumes

that 1/2 LSb error is used (1024 steps for the A/D). The

1/2 LSb error is the maximum error allowed for the A/D

to meet its speciﬁed resolution.

Example 16-1 shows the calculation of the minimum

required acquisition time TACQ.

This calculation is based on the following application

system assumptions.

CHOLD

120 pF

10 k

Ω

Conversion Error

≤

1/2 LSb

VDD

→ Rss = 7 kΩ

(see

graph in Figure 16-5)

Temperature

°C (system max.)

VHOLD

0V @ time = 0

EQUATION 16-1:

ACQUISITION TIME

EQUATION 16-2:

A/D MINIMUM CHARGING TIME

EXAMPLE 16-1: CALCULATING THE MINIMUM REQUIRED ACQUISITION TIME

TACQ =

Ampliﬁer Settling Time +

Holding Capacitor Charging Time +

Temperature Coefﬁcient

=TAMP + TC + TCOFF

VHOLD

(VREF - (VREF/2048)) • (1 - e(-Tc/C

HOLD

(RIC + RSS + RS)))

-(120 pF)(1 k

Ω + RSS + RS) ln(1/2047)

TACQ =TAMP + TC + TCOFF

Temperature coefﬁcient is only required for temperatures > 25

°C.

TACQ =2

µs + Tc + [(Temp - 25°C)(0.05 µs/°C)]

TC =-CHOLD (RIC + RSS + RS) ln(1/2047)

-120 pF (1 k

Ω + 7 kΩ + 10 kΩ) ln(0.0004885)

-120 pF (18 k

Ω) ln(0.0004885)

-2.16

µs (-7.6241)

16.47

µs

TACQ =2

µs + 16.47 µs + [(50°C - 25°C)(0.05 µs/°C)]

18.447

µs + 1.25 µs

19.72

µs

Note 1: The reference voltage (VREF) has no effect on the equation, since it cancels itself out.

Note 2: The charge holding capacitor (CHOLD) is not discharged after each conversion.

Note 3: The maximum recommended impedance for analog sources is 10 k

Ω.This is required to meet the pin leak-

age speciﬁcation.

Note 4: After a conversion has completed, a 2.0TAD delay must complete before acquisition can begin again. Dur-

ing this time the holding capacitor is not connected to the selected A/D input channel.

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