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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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PIC17C752-08/CL датащи(PDF) 122 Page - Microchip Technology |
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PIC17C752-08/CL датащи(HTML) 122 Page - Microchip Technology |
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122 / 328 page  PIC17C7XX DS30289A-page 122 © 1998 Microchip Technology Inc. FIGURE 14-5: ASYNCHRONOUS MASTER TRANSMISSION FIGURE 14-6: ASYNCHRONOUS MASTER TRANSMISSION (BACK TO BACK) TABLE 14-6: REGISTERS ASSOCIATED WITH ASYNCHRONOUS TRANSMISSION Address Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Value on POR, BOR MCLR, WDT 16h, Bank 1 PIR1 RBIF TMR3IF TMR2IF TMR1IF CA2IF CA1IF TX1IF RC1IF x000 0010 u000 0010 17h, Bank 1 PIE1 RBIE TMR3IE TMR2IE TMR1IE CA2IE CA1IE TX1IE RC1IE 0000 0000 0000 0000 13h, Bank 0 RCSTA1 SPEN RX9 SREN CREN — FERR OERR RX9D 0000 -00x 0000 -00u 16h, Bank 0 TXREG1 Serial port transmit register (USART1) xxxx xxxx uuuu uuuu 15h, Bank 0 TXSTA1 CSRC TX9 TXEN SYNC — — TRMT TX9D 0000 --1x 0000 --1u 17h, Bank 0 SPBRG1 Baud rate generator register (USART1) 0000 0000 0000 0000 10h, Bank 4 PIR2 SSPIF BCLIF ADIF — CA4IF CA3IF TX2IF RC2IF 000- 0010 000- 0010 11h, Bank 4 PIE2 SSPIE BCLIE ADIE — CA4IE CA3IE TX2IE RC2IE 000- 0000 000- 0000 13h, Bank 4 RCSTA2 SPEN RX9 SREN CREN — FERR OERR RX9D 0000 -00x 0000 -00u 16h, Bank 4 TXREG2 Serial port transmit register (USART2) xxxx xxxx uuuu uuuu 15h, Bank 4 TXSTA2 CSRC TX9 TXEN SYNC — — TRMT TX9D 0000 --1x 0000 --1u 17h, Bank 4 SPBRG2 Baud rate generator register (USART2) 0000 0000 0000 0000 Legend: x = unknown, u = unchanged, - = unimplemented read as a '0', shaded cells are not used for asynchronous transmission. Word 1 Stop Bit Word 1 Transmit Shift Reg Start Bit Bit 0 Bit 1 Bit 7/8 Write to TXREG Word 1 BRG output (shift clock) TX TXIF bit TRMT bit (TX/CK pin) Transmit Shift Reg. Write to TXREG BRG output (shift clock) TX TXIF bit TRMT bit Word 1 Word 2 Word 1 Word 2 Start Bit Stop Bit Start Bit Transmit Shift Reg. Word 1 Word 2 Bit 0 Bit 1 Bit 7/8 Bit 0 Note: This timing diagram shows two consecutive transmissions. (TX/CK pin) |
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