PIC16C925-SSLASHCL datasheet(104/182 Pages) MICROCHIP

104 / 182 page

PIC16C925/926

DS39544A-page 102

Preliminary

 2001 Microchip Technology Inc.

12.4

Power-on Reset (POR),

Power-up Timer (PWRT),

Brown-out Reset (BOR) and

Oscillator Start-up Timer (OST)

12.4.1

POWER-ON RESET (POR)

A Power-on Reset pulse is generated on-chip when

VDD rise is detected (in the range of 1.5V - 2.1V). To

take advantage of the POR, just tie the MCLR pin

directly (or through a resistor) to VDD. This will elimi-

nate external RC components usually needed to create

a Power-on Reset. A maximum rise time for VDD is

specified. See Electrical Specifications for details.

When the device starts normal operation (exits the

RESET condition), device operating parameters (volt-

age, frequency, temperature, etc.) must be met to

ensure operation. If these conditions are not met, the

device must be held in RESET until the operating con-

ditions are met.

For additional information, refer to Application Note

AN607, “Power-up Trouble Shooting.”

12.4.2

POWER-UP TIMER (PWRT)

The Power-up Timer provides a fixed 72 ms nominal

time-out on power-up only, from the POR. The

Power-up Timer operates on an internal RC oscillator.

The chip is kept in RESET as long as the PWRT is

active. The PWRT’s time delay allows VDD to rise to an

acceptable level. A configuration bit is provided to

enable/disable the PWRT.

The power-up time delay will vary from chip to chip due

to VDD, temperature, and process variation. See DC

parameters for details.

12.4.3

OSCILLATOR START-UP TIMER

(OST)

The Oscillator Start-up Timer (OST), if enabled, pro-

vides 1024 oscillator cycle (from OSC1 input) delay

after the PWRT delay (if the PWRT is enabled). This

helps to ensure that the crystal oscillator or resonator

has started and stabilized.

The OST time-out is invoked only for XT, LP and HS

modes and only on Power-on Reset or wake-up from

SLEEP.

12.4.4

BROWN-OUT RESET (BOR)

The configuration bit, BOREN, can enable or disable

the Brown-out Reset circuit. If VDD falls below VBOR

(parameter D005, about 4V) for longer than TBOR

(parameter #35, about 100

µS), the brown-out situation

will reset the device. If VDD falls below VBOR for less

than TBOR, a RESET may not occur.

Once the brown-out occurs, the device will remain in

Brown-out Reset until VDD rises above VBOR. The

Power-up Timer, if enabled, then keeps the device in

RESET for TPWRT (parameter #33, about 72mS). If

VDD should fall below VBOR during TPWRT, the

Brown-out Reset process will restart when VDD rises

above VBOR with the Power-up Timer Reset. The

Power-up Timer is enabled separately from Brown-out

Reset.

12.4.5

TIME-OUT SEQUENCE

On power-up, the time-out sequence is as follows:

First, PWRT time-out is invoked after the POR time

delay has expired. Then, OST is activated. The total

time-out will vary based on oscillator configuration and

the status of the PWRT. For example, in RC mode with

the PWRT disabled, there will be no time-out at all.

Figure 12-7,

Figure 12-8,

and

Figure 12-9

depict

time-out sequences on power-up.

Since the time-outs occur from the POR pulse, if MCLR

is kept low long enough, the time-outs will expire. Then

bringing MCLR high will begin execution immediately

(Figure 12-8). This is useful for testing purposes or to

synchronize more than one PIC16CXXX device oper-

ating in parallel.

Table 12-5 shows the RESET conditions for some spe-

cial function registers, while Table 12-6 shows the

RESET conditions for all the registers.

12.4.6

POWER CONTROL/STATUS

The Power Control/Status Register, PCON, has up to

two bits depending upon the device.

Bit0 is Brown-out Reset Status bit, BOR. Bit BOR is

unknown on a Power-on Reset. It must then be set by

the user and checked on subsequent RESETS to see if

bit BOR cleared, indicating a BOR occurred. When the

Brown-out Reset is disabled, the state of the BOR bit is

unpredictable and is, therefore, not valid at any time.

Bit1 is Power-on Reset Status bit POR. It is cleared on

a Power-on Reset and unaffected otherwise. The user

must set this bit following a Power-on Reset.

TABLE 12-3:

TIME-OUT IN VARIOUS SITUATIONS

Oscillator Configuration

Power-up

Wake-up from SLEEP

PWRTE = 1

PWRTE = 0

XT, HS, LP

1024TOSC

72 ms + 1024TOSC

1024 TOSC

—

72 ms

—

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