PIC16C925-SSLASHCL datasheet(33/182 Pages) MICROCHIP

33 / 182 page

 2001 Microchip Technology Inc.

Preliminary

DS39544A-page 31

PIC16C925/926

4.2

PORTB and TRISB Register

PORTB is an 8-bit wide, bi-directional port. The corre-

sponding data direction register is TRISB. Setting a bit

in the TRISB register puts the corresponding output

driver in a Hi-Impedance Input mode. Clearing a bit in

the TRISB register puts the contents of the output latch

on the selected pin(s).

EXAMPLE 4-2:

INITIALIZING PORTB

Each of the PORTB pins has a weak internal pull-up. A

single control bit can turn on all the pull-ups. This is per-

formed by clearing bit RBPU (OPTION<7>). The weak

pull-up is automatically turned off when the port pin is

configured as an output. The pull-ups are also disabled

on a Power-on Reset.

FIGURE 4-3:

BLOCK DIAGRAM OF

RB3:RB0 PINS

Four

the

PORTB

pins

(RB7:RB4)

have

interrupt-on-change feature. Only pins configured as

inputs can cause this interrupt to occur (i.e., any

RB7:RB4 pin configured as an output is excluded from

the interrupt-on-change comparison). The input pins (of

RB7:RB4) are compared with the old value latched on

the last read of PORTB. The “mismatch” outputs of

RB7:RB4 are OR’ed together to generate the RB Port

Change Interrupt with flag bit RBIF (INTCON<0>).

This interrupt can wake the device from SLEEP. The

user, in the Interrupt Service Routine, can clear the

interrupt in the following manner:

Any read or write of PORTB. This will end the

mismatch condition.

Clear flag bit RBIF.

A mismatch condition will continue to set flag bit RBIF.

Reading PORTB will end the mismatch condition, and

allow flag bit RBIF to be cleared.

This interrupt-on-mismatch feature, together with soft-

ware configurable pull-ups on these four pins, allow easy

interface to a keypad and make it possible for wake-up on

key depression. Refer to the Embedded Control Hand-

book, “Implementing Wake-Up on Key Stroke” (AN552).

The interrupt-on-change feature is recommended for

wake-up on key depression operation and operations

where PORTB is only used for the interrupt-on-change

feature. Polling of PORTB is not recommended while

using the interrupt-on-change feature.

FIGURE 4-4:

BLOCK DIAGRAM OF

RB7:RB4 PINS

BCF

STATUS, RP0

; Select Bank0

BCF

STATUS, RP1

CLRF

PORTB

; Initialize PORTB

BSF

STATUS, RP0

; Select Bank1

MOVLW

0xCF

; Value used to

; initialize data

; direction

MOVWF

TRISB

; Set RB<3:0> as inputs

; RB<5:4> as outputs

; RB<7:6> as inputs

Data Latch

RBPU(2)

VDD

Data Bus

WR Port

WR TRIS

RD TRIS

RD Port

Weak

Pull-up

RD Port

RB0/INT

I/O

pin(1)

TTL

Input

Buffer

Schmitt Trigger

Buffer

TRIS Latch

Note 1:

I/O pins have diode protection to VDD and VSS.

To enable weak pull-ups, set the appropriate TRIS

bit(s) and clear the RBPU bit (OPTION<7>).

Data Latch

From other

RBPU(2)

VDD

I/O

Data Bus

WR Port

WR TRIS

Set RBIF

TRIS Latch

RD TRIS

RD Port

RB7:RB4 pins

Weak

Pull-up

RD Port

Latch

TTL

Input

Buffer

pin(1)

Buffer

RB7:RB6 in Serial Programming Mode

Note 1:

I/O pins have diode protection to VDD and VSS.

To enable weak pull-ups, set the appropriate TRIS

bit(s) and clear the RBPU bit (OPTION<7>).

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