PIC16C925-SSLASHCL datasheet(69/182 Pages) MICROCHIP

69 / 182 page

 2001 Microchip Technology Inc.

Preliminary

DS39544A-page 67

PIC16C925/926

Figure 9-11 and Figure 9-12 show master-transmitter

and Master-receiver data transfer sequences.

When a master does not wish to relinquish the bus (by

generating a STOP condition), a Repeated START

condition (Sr) must be generated. This condition is

identical to the START condition (SDA goes high-to-low

while SCL is high), but occurs after a data transfer

Acknowledge pulse (not the bus-free state). This allows

a master to send “commands” to the slave and then

receive the requested information, or to address a dif-

ferent slave device. This sequence is shown in

Figure 9-13.

FIGURE 9-11:

MASTER-TRANSMITTER SEQUENCE

FIGURE 9-12:

MASTER-RECEIVER SEQUENCE

FIGURE 9-13:

COMBINED FORMAT

For 7-bit address:

Slave Address

First 7 bits

SR/W A1 Slave Address

Second byte

Data A

Data

A master-transmitter addresses a slave-receiver

with a 10-bit address.

A/A

Slave Address R/W AData A Data A/A P

'0' (write)

data transferred

(n bytes - Acknowledge)

A master-transmitter addresses a slave-receiver with a

7-bit address. The transfer direction is not changed.

From master to slave

From slave to master

A = Acknowledge (SDA low)

A = Not Acknowledge (SDA high)

S = START Condition

P = STOP Condition

(write)

For 10-bit address:

For 7-bit address:

Slave Address

First 7 bits

SR/W A1 Slave Address

Second byte

A master-transmitter addresses a slave-receiver

with a 10-bit address.

Slave Address R/W AData A Data A

'1' (read)

data transferred

(n bytes - Acknowledge)

A master reads a slave immediately after the first byte.

From master to slave

From slave to master

A = Acknowledge (SDA low)

A = Not Acknowledge (SDA high)

S = START Condition

P = STOP Condition

(write)

For 10-bit address:

Slave Address

First 7 bits

R/W A3

Data A

Data

(read)

Combined format:

Combined format - A master addresses a slave with a 10-bit address, then transmits

Slave Address R/W AData A/A Sr

(read)

Sr = repeated

Transfer direction of data and Acknowledgment bits depends on R/W bits.

From master to slave

From slave to master

A = Acknowledge (SDA low)

A = Not Acknowledge (SDA high)

S = START Condition

P = STOP Condition

Slave Address

First 7 bits

R/W A

(write)

data to this slave and reads data from this slave.

Slave Address

Second byte

Data

Sr Slave Address

First 7 bits

R/W AData A

A P

AData A/A

Data

(read)

Slave Address R/W AData A/A

START Condition

(write)

Direction of transfer

may change at this point

(read or write)

(n bytes + Acknowledge)

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