RM0319 datasheet(151/368 Pages) STMICROELECTRONICS

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RM0319

Fast Ethernet port (MII0)

Doc ID 022640 Rev 3

151/368

12.4

Clocks

The clocking scheme for the MAC-AHB is shown in Figure 48. The MAC-AHB uses three

clock inputs for normal operation with the MII interface:

●

One clock (clk_tx_i) for transmission functions

●

One clock (clk_rx_i) for reception functions

●

One application clock (hclk_i)

All clocks except for the application clock are generated from an external PHY. The

application clock is used for the control interface of the MAC-AHB. The transmit clock

clk_tx_i is used for the transmission function of the MAC-AHB. Similarly, the receive clock

clk_rx_i is used for the receive function of the MAC-AHB. The transfer of data from/to the

application clock domain to the transmit and receive clock domains is performed in the MTL

module.

The clk_tx_ i clock gets input from an external PHY (MII mode).

The external PHY outputs a 25 MHz or 2.5 MHz transmit clock on MII_CLK when it operates

at 100 Mbps or 10 Mbps, respectively. The frequency of clock clk_rx_i is the same as for

receive clock MII_RX_CLK generated by the external PHY. The PHY outputs a 25 MHz or

2.5 MHz receive clock on MII_RX_CLK when it operates at 100 Mbps, or 10 Mbps,

respectively.

[13]

Reserved

[12:00] RBS1

Receive Buffer 1 Size. This 13-bit field reports the size (in bytes) of the first

data buffer.

Note: The RBS1 value must be a multiple of 4/8/16 depending on the bus

width otherwise the resulting behaviour is undefined.

Note: If RBS1 value is 13'h0, then the DMA ignores this buffer and uses the

2nd buffer or next descriptor (depending on RCH bit value).

Table 50.

Receive descriptor 2 (RDES2)

Bit

Name

Description

[31:00]

Buffer 1 Address

Pointer

This field indicates the physical address of the 1st data buffer pointed to

by this descriptor.

Table 51.

Receive descriptor 3 (RDES3)

Bit

Name

Description

[31:00]

Buffer 2 Address

Pointer

(Next Descriptor

Address)

This field indicates the physical address of the 2nd data buffer pointed

to by this descriptor, if descriptor chaining is used.

If RDES1[24] bit is set, then this field contains the pointer to the

physical memory when the next descriptor is present.

Table 49.

Receive descriptor 1 (RDES1) (continued)

Bit

Name

Description

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