M68ICS08GR datasheet(121/408 Pages) FREESCALE

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Clock Generator Module (CGMC)

CGMC Registers

MC68HC908GR8 — Rev 4.0

Technical Data

MOTOROLA

Clock Generator Module (CGMC)

121

7.6.5 PLL VCO Range Select Register

NOTE:

PMRS may be called PVRS on other HC08 derivatives.

The PLL VCO range select register (PMRS) contains the programming

information required for the hardware configuration of the VCO.

VRS7–VRS0 — VCO Range Select Bits

These read/write bits control the hardware center-of-range linear

multiplier L which, in conjunction with E (see PLL Circuits,

Programming the PLL, and PLL Control Register), controls the

hardware center-of-range frequency, fVRS. VRS7–VRS0 cannot be

written when the PLLON bit in the PCTL is set. (See Special

Programming Exceptions.) A value of $00 in the VCO range select

Programming Exceptions.). Reset initializes the register to $40 for a

default range multiply value of 64.

NOTE:

The VCO range select bits have built-in protection such that they cannot

be written when the PLL is on (PLLON = 1) and such that the VCO clock

cannot be selected as the source of the base clock (BCS = 1) if the VCO

range select bits are all clear.

The PLL VCO range select register must be programmed correctly.

Incorrect programming can result in failure of the PLL to achieve lock.

Address:

$003A

Bit 7

654321

Bit 0

Read:

VRS7

VRS6

VRS5

VRS4

VRS3

VRS2

VRS1

VRS0

Write:

Reset:

01000000

Figure 7-8. PLL VCO Range Select Register (PMRS)

Freescale Semiconductor, Inc.

For More Information On This Product,

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