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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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M68ICS08GR датащи(PDF) 94 Page - Freescale Semiconductor, Inc |
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M68ICS08GR датащи(HTML) 94 Page - Freescale Semiconductor, Inc |
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94 / 408 page  Break Module (BRK) Technical Data MC68HC908GR8 — Rev 4.0 94 Break Module (BRK) MOTOROLA The break interrupt begins after completion of the CPU instruction in progress. If the break address register match occurs on the last cycle of a CPU instruction, the break interrupt begins immediately. 6.4.3 TIMI and TIM2 During Break Interrupts A break interrupt stops the timer counters. 6.4.4 COP During Break Interrupts The COP is disabled during a break interrupt when VTST is present on the RST pin. 6.5 Low-Power Modes The WAIT and STOP instructions put the MCU in low power- consumption standby modes. 6.5.1 Wait Mode If enabled, the break module is active in wait mode. In the break routine, the user can subtract one from the return address on the stack if SBSW is set. See Low Power Modes. Clear the BW bit by writing logic 0 to it. 6.5.2 Stop Mode A break interrupt causes exit from stop mode and sets the SBSW bit in the break status register. 6.6 Break Module Registers These registers control and monitor operation of the break module: • Break status and control register (BRKSCR) • Break address register high (BRKH) Freescale Semiconductor, Inc. For More Information On This Product, Go to: www.freescale.com |
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