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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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M68ICS08GR датащи(PDF) 67 Page - Freescale Semiconductor, Inc |
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M68ICS08GR датащи(HTML) 67 Page - Freescale Semiconductor, Inc |
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67 / 408 page  Resets and Interrupts Interrupts MC68HC908GR8 — Rev 4.0 Technical Data MOTOROLA Resets and Interrupts 67 Figure 4-4. Interrupt Stacking Order After every instruction, the CPU checks all pending interrupts if the I bit is not set. If more than one interrupt is pending when an instruction is done, the highest priority interrupt is serviced first. In the example shown in Figure 4-5, if an interrupt is pending upon exit from the interrupt service routine, the pending interrupt is serviced before the LDA instruction is executed. CONDITION CODE REGISTER ACCUMULATOR INDEX REGISTER (LOW BYTE)* PROGRAM COUNTER (HIGH BYTE) PROGRAM COUNTER (LOW BYTE) • • • • • • 1 2 3 4 5 5 4 3 2 1 STACKING ORDER *High byte of index register is not stacked. $00FF DEFAULT ADDRESS ON RESET UNSTACKING ORDER Freescale Semiconductor, Inc. For More Information On This Product, Go to: www.freescale.com |
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