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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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M68ICS08GR датащи(PDF) 92 Page - Freescale Semiconductor, Inc |
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M68ICS08GR датащи(HTML) 92 Page - Freescale Semiconductor, Inc |
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92 / 408 page  Break Module (BRK) Technical Data MC68HC908GR8 — Rev 4.0 92 Break Module (BRK) MOTOROLA 6.4 Functional Description When the internal address bus matches the value written in the break address registers, the break module issues a breakpoint signal to the CPU. The CPU then loads the instruction register with a software interrupt instruction (SWI) after completion of the current CPU instruction. The program counter vectors to $FFFC and $FFFD ($FEFC and $FEFD in monitor mode). The following events can cause a break interrupt to occur: • A CPU-generated address (the address in the program counter) matches the contents of the break address registers. • Software writes a logic 1 to the BRKA bit in the break status and control register. When a CPU-generated address matches the contents of the break address registers, the break interrupt begins after the CPU completes its current instruction. A return-from-interrupt instruction (RTI) in the break routine ends the break interrupt and returns the MCU to normal operation. Figure 6-1 shows the structure of the break module. Figure 6-1. Break Module Block Diagram IAB15–IAB8 IAB7–IAB0 8-BIT COMPARATOR 8-BIT COMPARATOR CONTROL BREAK ADDRESS REGISTER LOW BREAK ADDRESS REGISTER HIGH IAB15–IAB0 BREAK Freescale Semiconductor, Inc. For More Information On This Product, Go to: www.freescale.com |
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