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M68ICS08GR датащи(PDF) 81 Page - Freescale Semiconductor, Inc |
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M68ICS08GR датащи(HTML) 81 Page - Freescale Semiconductor, Inc |
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81 / 408 page ![]() Analog-to-Digital Converter (ADC) Functional Description MC68HC908GR8 — Rev 4.0 Technical Data MOTOROLA Analog-to-Digital Converter (ADC) 81 Figure 5-1. ADC Block Diagram 5.4.1 ADC Port I/O Pins PTB5/ATD5–PTB0/ATD0 are general-purpose I/O (input/output) pins that share with the ADC channels. The channel select bits define which ADC channel/port pin will be used as the input signal. The ADC overrides the port I/O logic by forcing that pin as input to the ADC. The remaining ADC channels/port pins are controlled by the port I/O logic and can be used as general-purpose I/O. Writes to the port register or DDR will not have any affect on the port pin that is selected by the ADC. Read of a port pin in use by the ADC will return a logic 0. INTERNAL DATA BUS READ DDRBx WRITE DDRBx RESET WRITE PTBx READ PTBx PTBx DDRBx PTBx INTERRUPT LOGIC CHANNEL SELECT ADC CLOCK GENERATOR CONVERSION COMPLETE ADC (VADIN) ADC CLOCK CGMXCLK BUS CLOCK ADCH4–ADCH0 ADC DATA REGISTER AIEN COCO DISABLE DISABLE ADC CHANNEL x ADIV2–ADIV0 ADICLK VOLTAGE IN Freescale Semiconductor, Inc. For More Information On This Product, Go to: www.freescale.com |
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