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AD9789BBCZ датащи(PDF) 24 Page - Analog Devices |
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AD9789BBCZ датащи(HTML) 24 Page - Analog Devices |
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24 / 76 page ![]() AD9789 Rev. A | Page 24 of 76 Read If the instruction word is for a read operation, the next N × 8 SCLK cycles clock out the data from the address specified in the instruction word, where N is 1 to 3 as determined by Bits[N1:N0]. If N = 4, the read operation is in streaming mode, continuing until CS is raised. Streaming mode does not skip over reserved or blank registers. The readback data is valid on the falling edge of SCLK. The default mode of the AD9789 serial control port is the uni- directional mode. In unidirectional mode, the readback data appears on the SDO pin. It is also possible to set the AD9789 to bidirectional mode using the SDIO_DIR bit (Register 0x00[7]). In bidirectional mode, both the sent data and the readback data appear on the SDIO pin. A readback request reads the data that is in the serial control port buffer area or the data in the active registers (see Figure 63). The AD9789 supports only the long instruction mode; therefore, Register 0x00[4:3] reads 11 (this register uses mirrored bits). Long instruction mode is the default at power-up or reset, and writing to these bits has no effect. The AD9789 uses Register Address 0x00 to Register Address 0x55. SERIAL CONTROL PORT SCLK SDO SDIO CS FREQNEW WRITE REGISTER 0x1E = 0x10 TO UPDATE REGISTERS Figure 63. Relationship Between Serial Control Port Buffer Registers and Active Registers of the AD9789 INSTRUCTION WORD (16 BITS) The MSB of the instruction word is R/W, which indicates whether the instruction is a read or a write. The next two bits, N1 and N0, indicate the length of the transfer in bytes. The final 13 bits (Bits[A12:A0]) are the address at which to begin the read or write operation. For a write, the instruction word is followed by the number of bytes of data indicated by Bits[N1:N0] (see Table 7). Table 7. Byte Transfer Count N1 N0 Bytes to Transfer 0 0 1 0 1 2 1 0 3 1 1 Streaming mode Bits[A12:A0] select the address within the register map that is written to or read from during the data transfer portion of the communication cycle. Only Bits[A6:A0] are needed to cover the range of the 0x55 registers used by the AD9789. Bits[A12:A7] must always be 0. For multibyte transfers, this address is the starting byte address. In MSB first mode, subsequent bytes increment the address. MSB/LSB FIRST TRANSFERS The AD9789 instruction word and byte data can be MSB first or LSB first. Any data written to Register 0x00 must be mirrored, the upper four bits (Bits[7:4]) with the lower four bits (Bits [3:0]). This makes it irrelevant whether LSB first or MSB first is in effect. As an example of this mirroring, the default setting for Register 0x00[7:0] is 0x18, which mirrors Bit 4 and Bit 3. These bits set the long instruction mode (the default and the only mode supported). The default for the AD9789 is MSB first. When LSB first is set by Register 0x00[1] and Register 0x00[6], it takes effect immediately. In multibyte transfers, subsequent bytes reflect any changes in the serial port configuration. When MSB first mode is active, the instruction and data bytes must be written from MSB to LSB. Multibyte data transfers in MSB first format start with an instruction byte that includes the register address of the most significant data byte. Subsequent data bytes must follow in order from the high address to the low address. In MSB first mode, the serial control port internal address generator decrements for each data byte of the multi- byte transfer cycle. When LSB first mode is active, the instruction and data bytes must be written from LSB to MSB. Multibyte data transfers in LSB first format start with an instruction byte that includes the register address of the least significant data byte followed by multiple data bytes. The internal byte address generator of the serial control port increments for each byte of the multibyte transfer cycle. The AD9789 serial control port register address decrements from the register address just written toward 0x00 for multibyte I/O operations if the MSB first mode is active (default). If the LSB first mode is active, the register address of the serial control port increments from the address just written toward 0x55 for multibyte I/O operations. Streaming mode always terminates when it reaches Address 0x2F. Note that unused addresses are not skipped during multibyte I/O operations. Table 8. Streaming Mode (No Addresses Are Skipped) Write Mode Address Direction Stop Sequence LSB First Increment 0x02D, 0x02E, 0x02F, stop MSB First Decrement 0x001, 0x000, 0x02F, stop |
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