AD9789BBCZ datasheet(10/76 Pages) AD

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AD9789

Rev. A | Page 10 of 76

Table 6. Pin Function Descriptions

Pin No.

Mnemonic

Description

A1, A2, A3, A6, A9, A10, A11,

B1, B2, B3, B6, B7, B8, B9,

B10, B11, C2, C3, C6, C7, C8,

C9, C10, C11, D2, D3, D6, D7,

D8, D9, D10, D11, E1, E2, E3,

E4, E13, E14, F1, F2, F3, F4,

F11, F12, F13, F14

AVSS

Analog Supply Ground.

A4, A5, B4, B5, C4, C5, D4, D5

CVDD18

1.8 V Clock Supply.

IOUTN

DAC Negative Output Current.

IOUTP

DAC Positive Output Current.

A12, A13, B12, B13, C12, C13,

D12, D13

AVDD33

3.3 V Analog Supply.

A14

No Connect. Leave floating.

B14

I120

Tie this pin to analog ground with a 10 kΩ resistor to generate a 120 μA reference current.

CLKN

Negative DAC Clock Input (DACCLK).

C14

VREF

Band Gap Voltage Reference I/O. Decouple to analog ground with a 1 nF capacitor.

Output impedance is approximately 5 kΩ.

CLKP

Positive DAC Clock Input (DACCLK).

D14

IPTAT

Factory Test Pin. Output current, proportional to absolute temperature, is

approximately 10 μA at 25°C with a slope of approximately 20 nA/°C.

E11, E12

DVDD18

1.8 V Digital Supply.

G1, G2, G3, G4, G7, G8, G11,

G12, G13, G14

DVDD15

1.5 V Digital Supply.

H1, H2, H3, H4, H7, H8, H11,

H12, H13, H14, J1, J2, J3, J4,

J11, J12, J13, J14

DVSS

Digital Supply Ground.

K1, K2, K3, K4, K11, K12, K13,

K14

DVDD33

3.3 V Digital Supply.

Active Low Chip Select for SPI.

L2, L3, M2, M3, N3, N4, P3, P4

Not Used. Leave unconnected.

P1/PARP

CMOS/LVDS Parity Bit.

D31/D15P

CMOS/LVDS Data Input.

D27/D13P

CMOS/LVDS Data Input.

D23/D11P

CMOS/LVDS Data Input.

D19/D9P

CMOS/LVDS Data Input.

D15/D7P

CMOS/LVDS Data Input.

L10

D11/D5P

CMOS/LVDS Data Input.

L11

D7/D3P

CMOS/LVDS Data Input.

L12

D3/D1P

CMOS/LVDS Data Input.

L13

FSP

Positive LVDS Frame Sync (FSP) for Data Bus.

L14

CMOS_BUS

Active High Input. Configures data bus for CMOS inputs. Low input configures data bus

to accept LVDS inputs.

SCLK

Qualifying Clock for SPI.

P0/PARN

CMOS/LVDS Parity Bit.

D30/D15N

CMOS/LVDS Data Input.

D26/D13N

CMOS/LVDS Data Input.

D22/D11N

CMOS/LVDS Data Input.

D18/D9N

CMOS/LVDS Data Input.

D14/D7N

CMOS/LVDS Data Input.

M10

D10/D5N

CMOS/LVDS Data Input.

M11

D6/D3N

CMOS/LVDS Data Input.

M12

D2/D1N

CMOS/LVDS Data Input.

M13

FSN

Negative LVDS Frame Sync (FSN) for Data Bus.

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