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MPC8315ECVRAGDA датащи(PDF) 110 Page - Freescale Semiconductor, Inc |
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MPC8315ECVRAGDA датащи(HTML) 110 Page - Freescale Semiconductor, Inc |
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110 / 112 page ![]() MPC8315E PowerQUICC™ II Pro Processor Hardware Specifications, Rev. 0 110 Freescale Semiconductor Document Revision History Table shows the SVR settings by device and package type. 28 Document Revision History Table 83 provides a revision history for this hardware specification. Table 81. Part Numbering Nomenclature MPC 8315 EC VR AG D A Product Code Part Identifier Encryption Acceleration Temperature Range 3 Package 1 e300 Core Frequency 2 DDR Frequency Revision Level MPC 8315 Blank = Not included E = included Blank = 0 to 105 °C C = –40 to 105 °C VR= Pb Free TEPBGA II AD = 266 MHz AF = 333 MHz AG = 400 MHz D = 266 MHz Contact local Freescale sales office Notes: 1. See Section 23, “Package and Pin Listings,” for more information on available package types. 2. Processor core frequencies supported by parts addressed by this specification only. Not all parts described in this specification support all core frequencies. Additionally, parts addressed by electric may support other maximum core frequencies. 3. Contact your local Freescale field applications engineer (FAE). Table 82. SVR Settings Device Package SVR (Rev 1.0) SVR (Rev 1.1) SVR (Rev 1.2) MPC8315E TEPBGA II 0x80B4_0010 0x80B4_0011 0x80B4_0012 MPC8315 TEPBGA II 0x80B5_0010 0x80B5_0011 0x80B5_0012 MPC8314E TEPBGA II 0x80B6_0010 0x80B6_0011 0x80B6_0012 MPC8314 TEPBGA II 0x80B7_0010 0x80B7_0011 0x80B7_0012 Notes: 1. PVR = 8085_0020 for all devices and revisions in this table. Table 83. Document Revision History Revision Date Substantive Change(s) 0 05/2009 Initial public release. |
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