MPC8315ECVRAGDA datasheet(40/112 Pages) FREESCALE

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MPC8315E PowerQUICC™ II Pro Processor Hardware Specifications, Rev. 0

Freescale Semiconductor

USB

10.1.1

USB DC Electrical Characteristics

Table 39 lists the DC electrical characteristics for the USB interface.

10.1.2

USB AC Electrical Specifications

Table 40 lists the general timing parameters of the USB-ULPI interface.

Figure 22 and Figure 23 provide the AC test load and signals for the USB, respectively.

Figure 22. USB AC Test Load

Table 39. USB DC Electrical Characteristics

Parameter

Symbol

Min

Max

Unit

High-level input voltage

VIH

LVDD + 0.3

Low-level input voltage

VIL

–0.3

0.8

Input current

IIN

—±5

μA

High-level output voltage, IOH = –100 μAVOH

LVDD – 0.2

—

Low-level output voltage, IOL = 100 μAVOL

—0.2

Note:

1. The symbol VIN, in this case, represents the NVIN symbol referenced in Table 1 and Table 2.

Table 40. USB General Timing Parameters

Parameter

Symbol 1

Min

Max

Unit

Notes

USB clock cycle time

tUSCK

—

1, 2

Input setup to USB clock—all inputs

tUSIVKH

4—

1, 4

Input hold to USB clock—all inputs

tUSIXKH

1—

1, 4

USB clock to output valid—all outputs

tUSKHOV

—9

Output hold from USB clock—all outputs

tUSKHOX

1—

Notes:

1. The symbols used for timing specifications follow the pattern of t(First two letters of functional block)(signal)(state)(reference)(state) for

inputs and t(First two letters of functional block)(reference)(state)(signal)(state) for outputs. For example, tUSIXKH symbolizes USB timing

(US) for the input (I) to go invalid (X) with respect to the time the USB clock reference (K) goes high (H). Also, tUSKHOX

symbolizes USB timing (US) for the us clock reference (K) to go high (H), with respect to the output (O) going invalid (X) or

output hold time.

2. All timings are in reference to USB clock.

3. All signals are measured from NVDD/2 of the rising edge of USB clock to 0.4

× NVDD of the signal in question for 3.3-V

signaling levels.

4. Input timings are measured at the pin.

5. For purposes of active/float timing measurements, the Hi-Z or off-state is defined to be when the total current delivered

through the component pin is less than or equal to the leakage current specification.

Output

Z0 = 50 Ω

NVDD/2

RL = 50 Ω

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