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MPC8315ECVRAGDA датащи(PDF) 18 Page - Freescale Semiconductor, Inc |
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MPC8315ECVRAGDA датащи(HTML) 18 Page - Freescale Semiconductor, Inc |
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18 / 112 page ![]() MPC8315E PowerQUICC™ II Pro Processor Hardware Specifications, Rev. 0 18 Freescale Semiconductor DDR and DDR2 SDRAM Table 10 provides the PLL lock times. 7 DDR and DDR2 SDRAM This section describes the DC and AC electrical specifications for the DDR SDRAM interface of the MPC8315E. Note that DDR SDRAM is GVDD(typ) = 2.5 V and DDR2 SDRAM is GVDD(typ) = 1.8 V. 7.1 DDR and DDR2 SDRAM DC Electrical Characteristics Table 11 provides the recommended operating conditions for the DDR2 SDRAM component(s) of the MPC8315E when GVDD(typ) = 1.8 V. Time for the device to turn on POR config signals with respect to the negation of HRESET 1— tPCI_SYNC_IN 1, 3 Notes: 1. tPCI_SYNC_IN is the clock period of the input clock applied to PCI_SYNC_IN. When the device is In PCI host mode the primary clock is applied to the SYS_CLKIN input, and PCI_SYNC_IN period depends on the value of CFG_SYS_CLKIN_DIV. 2. tSYS_CLKIN is the clock period of the input clock applied to SYS_CLKIN. It is only valid when the device is in PCI host mode. 3. POR configuration signals consists of CFG_RESET_SOURCE[0:3] and CFG_SYS_CLKIN_DIV. Table 10. PLL Lock Times Parameter/Condition Min Max Unit Notes System PLL lock times — 100 μs— e300 core PLL lock times — 100 μs— SerDes (SGMII/PCIExp Phy) PLL lock times — 100 μs— USB phy PLL lock times — 100 μs— SATA phy PLL lock times — 100 μs— Table 11. DDR2 SDRAM DC Electrical Characteristics for GVDD(typ) = 1.8 V Parameter/Condition Symbol Min Max Unit Notes I/O supply voltage GVDD 1.7 1.9 V 1 I/O reference voltage MVREF 0.49 × GVDD 0.51 × GVDD V 2 I/O termination voltage VTT MVREF – 0.04 MVREF + 0.04 V 3 Input high voltage VIH MVREF+ 0.125 GVDD + 0.3 V — Input low voltage VIL –0.3 MVREF – 0.125 V — Output leakage current IOZ –9.9 9.9 μA4 Output high current (VOUT = 1.420 V, GVDD= 1.7V) IOH –13.4 — mA — Table 9. RESET Initialization Timing Specifications (continued) |
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