MPC8315ECVRAGDA datasheet(108/112 Pages) FREESCALE

108 / 112 page

MPC8315E PowerQUICC™ II Pro Processor Hardware Specifications, Rev. 0

108

Freescale Semiconductor

System Design Information

26.4

Connection Recommendations

To ensure reliable operation, it is highly recommended to connect unused inputs to an appropriate signal

level. Unused active low inputs should be tied to NVDD, GVDD, or LVDD as required. Unused active

high inputs should be connected to GND. All NC (no-connect) signals must remain unconnected.

Power and ground connections must be made to all external VDD, GVDD, LVDD, NVDD, and GND pins

of the device.

26.5

Output Buffer DC Impedance

The MPC8315E drivers are characterized over process, voltage, and temperature. For all buses, the driver

is a push-pull single-ended driver type (open drain for I2C).

To measure Z0 for the single-ended drivers, an external resistor is connected from the chip pad to NVDD

or GND. Then, the value of each resistor is varied until the pad voltage is NVDD/2 (see Figure 64). The

output impedance is the average of two components, the resistances of the pull-up and pull-down devices.

When data is held high, SW1 is closed (SW2 is open) and RP is trimmed until the voltage at the pad equals

NVDD/2. RP then becomes the resistance of the pull-up devices. RP and RN are designed to be close to

each other in value. Then, Z0 = (RP + RN)/2.

Figure 64. Driver Impedance Measurement

The value of this resistance and the strength of the driver’s current source can be found by making two

measurements. First, the output voltage is measured while driving logic 1 without an external differential

termination resistor. The measured voltage is V1 = Rsource × Isource. Second, the output voltage is measured

while driving logic 1 with an external precision differential termination resistor of value Rterm. The

measured voltage is V2 =(1/(1/R1 +1/R2)) × Isource. Solving for the output impedance gives Rsource =

Rterm × (V1/V2 – 1). The drive current is then Isource =V1/Rsource.

Table 80 summarizes the signal impedance targets. The driver impedance are targeted at minimum VDD,

nominal NVDD, 105

°C.

NVDD

OGND

Pad

Data

SW1

SW2

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