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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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MPC8315ECVRAGDA датащи(PDF) 57 Page - Freescale Semiconductor, Inc |
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MPC8315ECVRAGDA датащи(HTML) 57 Page - Freescale Semiconductor, Inc |
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57 / 112 page  MPC8315E PowerQUICC™ II Pro Processor Hardware Specifications, Rev. 0 Freescale Semiconductor 57 High-Speed Serial Interfaces (HSSI) or AC-coupled into the unused phase (SD_REF_CLK) through the same source impedance as the clock input (SD_REF_CLK) in use. Figure 40. Differential Reference Clock Input DC Requirements (External DC-Coupled) Figure 41. Differential Reference Clock Input DC Requirements (External AC-Coupled) Figure 42. Single-Ended Reference Clock Input DC Requirements 15.2.3 Interfacing With Other Differential Signaling Levels With on-chip termination to XCOREVSS, the differential reference clocks inputs are HCSL (High-Speed Current Steering Logic) compatible DC-coupled. SD_REF_CLK SD_REF_CLK Vmax < 800 mV Vmin > 0 V 100 mV < Vcm < 400 mV 200 mV < Input Amplitude or Differential Peak < 800 mV SD_REF_CLK SD_REF_CLK Vcm 200 mV < Input Amplitude or Differential Peak < 800 mV Vmax < Vcm + 400 mV Vmin > Vcm – 400 mV SD_REF_CLK SD_REF_CLK 400 mV < SD_REF_CLK Input Amplitude < 800 mV 0V |
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