910GL datasheet(213/426 Pages) INTEL

номер детали	910GL

подробное описание детали	Express Chipset

PDF	426 Pages

Scroll/Zoom	100%

производитель	INTEL [Intel Corporation]

домашняя страница	http://www.intel.com

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213 / 426 page

System Address Map

Datasheet

213

⎯ Addresses decoded to the Memory Mapped Range of the Internal Graphics Device

(MMADR range). There is a MMADR range for device 2 function 0 and a MMADR

range for device 2 function 1. Both ranges are forwarded to the Internal Graphics

Device.

The exceptions listed above for internal graphics and the PCI Express ports MUST NOT overlap

with APCI Configuration, FSB Interrupt Space and High BIOS Address Range.

Figure 11-4. PCI Memory Address Range

High BIOS

E000_0000h

PCI_Address_Ranges_G-P-only

DMI Interface

(subtractively decode)

FSB Interrupts

DMI Interface

(subtractively decode)

Local (processor)

APIC

I/O APIC

DMI Interface

(subtractively decode)

PCI Express

Configuration Space

DMI Interface

(subtractively decode)

F000_0000h

FEC0_0000h

FEC8_0000h

FED0_0000h

FEE0_0000h

FEF0_0000h

FFE0_0000h

FFFF_FFFFh

4 GB

4 GB – 2 MB

4 GB – 17 MB

4 GB – 18 MB

4 GB – 19 MB

4 GB – 20 MB

4 GB – 256 MB

4 GB – 512 MB

TOLUD

Optional HSEG

FEDA_0000h to

FEDB_FFFFh

Possible address range

(Not guaranteed)

Programmable windows,

graphics ranges,

PCI Express* Port

could be here

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