910GL datasheet(158/426 Pages) INTEL

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Host-PCI Express* Bridge Registers (D1:F0)

(Intel® 82915G/82915P/82915PL Only)

158

Datasheet

8.1.40

SLOTCTL—Slot Control (D1:F0)

PCI Device:

Address Offset:

B8h

Default Value:

01C0h

Access:

R/W

Size:

16 bits

PCI Express slot related registers allow for the support of Hot-Plug.

Bit

Access &

Default

Description

15:10

Reserved

9:8

R/W

01b

Power Indicator Control: Reads to this register return the current state of the

Power Indicator.

Writes to this register set the Power Indicator and cause the Port to send the

appropriate POWER_INDICATOR_* messages.

00 = Reserved

01 = On

10 = Blink

11 = Off

7:6

R/W

11b

Attention Indicator Control: Reads to this register return the current state of

the Attention Indicator.

Writes to this register set the Attention Indicator and cause the Port to send the

appropriate ATTENTION_INDICATOR_* messages.

00 = Reserved

01 = On

10 = Blink

11 = Off

R/W

Hot plug Interrupt Enable:

0 = Disable.

1 = Enables generation of hot plug interrupt on enabled hot plug events.

R/W

Command Completed Interrupt Enable:

0 = Disable.

1 = Enables the generation of hot plug interrupt when the Hot plug controller

completes a command.

R/W

Presence Detect Changed Enable:

0 = Disable.

1 = Enables the generation of hot plug interrupt or wake message on a

presence detect changed event.

2:1

Reserved

R/W

Attention Button Pressed Enable:

0 = Disable.

1 = Enables the generation of hot plug interrupt or wake message on an

attention button pressed event.

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