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TS68230 датащи(PDF) 38 Page - STMicroelectronics |
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TS68230 датащи(HTML) 38 Page - STMicroelectronics |
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38 / 61 page ![]() function ; DMA is not used. PSRR SVCRQ Select 1 0 The PC4/DMAREQ pin carries the DMAREQ function and is associatedwith double-buffered transfers controlled by H1. H1 is removed from PI/T’s interrupt structure, and thus, does not cause interrupt requests to be generated. To obtain DMAREQ pulses, port A control register bit 1 (H1 SVCRQ enable) must be a one. 1 1 The PC4/DMAREQ pin carries the DMAREQ function and is associated with double-buffered transfers controlled by H3. H3 is removed from the PI/T’s interrupt structure, and thus, does not cause interrupts requests to be generated. To obtain DMAREQ pulses, port B control register bit 1 (H3 SVCRQ enable) must be one. PSRR 4 3 Interrupt Pin Function Select 0 0 The PC5/PIRQ pin carries the PC5 function, no interrupt support. The PC6/PIACK pin carries the PC6 function, no interrupt support. 0 1 The PC5/PIRQ pin carries the PIRQ function, supports autovectored interrupts. The PC6/PIACK pin carries the PC6 function, supports autovectored interrupts. 1 0 The PC5/PIRQ pin carries the PC5 function. The PC6/PIACK pin carries the PIACK function. 1 1 The PC5/PIRQ pin carries the PIRQ function, supports vectored interrupts. The PC6/PIACK pin carries the PIACK function, supports vectored interrupts. Table 4.2 : PSRR Port Interrupt Priority Control. 2 1 0 Highest .......................................Lowest 000 H1S H2S H3S H4S 001 H2S H1S H3S H4S 010 H1S H2S H4S H3S 011 H2S H1S H4S H3S 2 1 0 Highest .......................................Lowest 100 H3S H4S H1S H2S 101 H3S H4S H2S H1S 110 H4S H3S H1S H2S 111 H4S H3S H2S H1S TS68230 38/61 |
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