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TS68230 датащи(PDF) 24 Page - STMicroelectronics |
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TS68230 датащи(HTML) 24 Page - STMicroelectronics |
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24 / 61 page ![]() Programmable Option Mode 0 - Port A Submode 1X and Port B Submode 1X PACR 7 6 Port A Submode 1 X Submode 1X PACR 5 4 3 H2 Control 0 X X Input pin - edge-sensitive status input, H2S is set on an asserted edge. 1 X 0 Output pin - negated, H2S is always cleared. 1 X 1 Output pin - asserted, H2S is always cleared. PACR 2 H2 Interrupt Enable 0 The H2 interrupt is disabled. 1 The H2 interrupt is enabled. PACR 1 H1 SVCRQ Enable 0 The H1 interrupt is disabled. 1 The H1 interrupt is enabled. PACR 0 H1 Status Control X H1 is an edge-sensitive status input, H1S is set by an asserted edge of H1. PBCR 7 6 Port B Submode 1 X Submode 1X. PBCR 5 4 3 H4 Control 0 X X Input pin - edge-sensitive status input, H4S is set on an asserted edge. 1 X 0 Output pin - negated, H4S is always cleared. 1 X 1 Output pin - asserted, H4S is always cleared. PBCR 2 H4 Interrupt Enable 0 The H4 interrupt is disabled. 1 The H4 interrupt is enabled. PBCR 1 H3 SVCRQ Enable 0 The H3 interrupt is disabled. 1 The H3 interrupt is enabled. TS68230 24/61 |
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