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SH7721 датащи(PDF) 113 Page - Renesas Technology Corp

номер детали SH7721
подробное описание детали  Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7700 Series
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производитель  RENESAS [Renesas Technology Corp]
домашняя страница  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

SH7721 датащи(HTML) 113 Page - Renesas Technology Corp

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Section 2
CPU
Rev. 3.00 Jan. 18, 2008 Page 51 of 1458
REJ09B0033-0300
Figure 2.6 shows the control register configuration.
31
0
31
SPC
SSR
0
Save status register (SSR)
Save program counter (SPC)
31
0
31
VBR
GBR
0
Global base register (GBR)
Vector base register (VBR)
31
0
0 MD RB BL 0
Status register (SR)
T
S
0
0
I0
I1
I2
I3
Q
M
0
Figure 2.6
Control Register Configuration
2.4
Data Formats
2.4.1
Register Data Format
Register operands are always longwords (32 bits). When the memory operand is only a byte (8
bits) or a word (16 bits), it is sign-extended into a longword when loaded into a register.
31
0
Longword



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