SH7721 datasheet(32/1524 Pages) RENESAS

32 / 1524 page

Rev. 3.00 Jan. 18, 2008 Page xxxii of lxii

35.11 Port L ............................................................................................................................... 1201

35.11.1 Register Description ........................................................................................... 1201

35.11.2 Port L Data Register (PLDR).............................................................................. 1202

35.12 Port M .............................................................................................................................. 1203

35.12.1 Register Description ........................................................................................... 1203

35.12.2 Port M Data Register (PMDR) ........................................................................... 1204

35.13 Port P ............................................................................................................................... 1205

35.13.1 Register Description ........................................................................................... 1205

35.13.2 Port P Data Register (PPDR) .............................................................................. 1206

35.14 Port R ............................................................................................................................... 1207

35.14.1 Register Description ........................................................................................... 1207

35.14.2 Port R Data Register (PRDR) ............................................................................. 1208

35.15 Port S ............................................................................................................................... 1209

35.15.1 Register Description ........................................................................................... 1209

35.15.2 Port S Data Register (PSDR) .............................................................................. 1210

35.16 Port T ............................................................................................................................... 1211

35.16.1 Register Description ........................................................................................... 1211

35.16.2 Port T Data Register (PTDR).............................................................................. 1212

35.17 Port U............................................................................................................................... 1213

35.17.1 Register Description ........................................................................................... 1213

35.17.2 Port U Data Register (PUDR)............................................................................. 1214

35.18 Port V............................................................................................................................... 1215

35.18.1 Register Description ........................................................................................... 1215

35.18.2 Port V Data Register (PVDR)............................................................................. 1216

Section 36 User Debugging Interface (H-UDI)................................................. 1217

36.1

Features............................................................................................................................ 1217

36.2

Input/Output Pins ............................................................................................................. 1218

36.3

Register Descriptions ....................................................................................................... 1220

36.3.1 Bypass Register (SDBPR) .................................................................................. 1220

36.3.2 Instruction Register (SDIR) ................................................................................ 1220

36.3.3 Shift Register ...................................................................................................... 1221

36.3.4 Boundary Scan Register (SDBSR) ..................................................................... 1221

36.3.5 ID Register (SDID)............................................................................................. 1230

36.4

Operation ......................................................................................................................... 1231

36.4.1 TAP Controller ................................................................................................... 1231

36.4.2 Reset Configuration ............................................................................................ 1232

36.4.3 TDO Output Timing ........................................................................................... 1232

36.4.4 H-UDI Reset ....................................................................................................... 1233

36.4.5 H-UDI Interrupt .................................................................................................. 1233

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