SH7721 datasheet(59/1524 Pages) RENESAS

59 / 1524 page

Rev. 3.00 Jan. 18, 2008 Page lix of lxii

Table 26.5

Available Power-Supply Control-Sequence Periods at Typical Frame Rates....... 913

Table 26.6

LCDC Operating Modes....................................................................................... 914

Table 26.7

LCD Module Power-Supply States....................................................................... 914

Section 27 A/D Converter

Table 27.1

Pin Configuration.................................................................................................. 931

Table 27.2

Analog Input Channels and A/D Data Registers................................................... 932

Table 27.3

A/D Conversion Time (Single Mode)................................................................... 943

Table 27.4

Conditions for the Method of Transferring Results of A/D Conversion

and Inclusion of Superfluous DMA ...................................................................... 947

Table 27.5

Analog Input Pin Ratings...................................................................................... 950

Section 28 D/A Converter (DAC)

Table 28.1

Pin Configuration.................................................................................................. 954

Section 29 PC Card Controller (PCC)

Table 29.1

Features of the PCMCIA Interface ....................................................................... 959

Table 29.2

PCC Pin Configuration ......................................................................................... 962

Table 29.3

PCMCIA Support Interface .................................................................................. 977

Section 30 SIM Card Module (SIM)

Table 30.1

Pin Configuration.................................................................................................. 989

Table 30.2

Table 30.3

Example of Bit Rates (bits/s) for SCBRR Settings

φ = 19.8 MHz, SCSMPL = 371)...................................................................... 1011

Table 30.4

Interrupt Sources of Smart Card Interface .......................................................... 1018

Section 31 MultiMediaCard Interface (MMCIF)

Table 31.1

Pin Configuration................................................................................................ 1029

Table 31.2

Correspondence between Commands and Settings of CMDTYR

and RSPTYR ...................................................................................................... 1034

Table 31.3

CMDR Configuration ......................................................................................... 1037

Table 31.4

Correspondence between Command Response Byte Number and RSPR........... 1039

Table 31.5

MMCIF Interrupt Sources................................................................................... 1108

Section 33 User Break Controller (UBC)

Table 33.1

Specifying Break Address Register .................................................................... 1116

Table 33.2

Specifying Break Data Register.......................................................................... 1118

Table 33.3

Data Access Cycle Addresses and Operand Size Comparison Conditions......... 1129

SH7721 датащи(PDF) 59 Page - Renesas Technology Corp

SH7721 датащи(HTML) 59 Page - Renesas Technology Corp

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

датащи скачать

ссылки URL