SH7721 datasheet(11/1524 Pages) RENESAS

11 / 1524 page

Rev. 3.00 Jan. 18, 2008 Page xi of lxii

Contents

Section 1 Overview..................................................................................................1

1.1

Features.................................................................................................................................. 1

1.2

Block Diagram ..................................................................................................................... 10

1.3

Pin Assignments................................................................................................................... 10

1.3.1

Pin Assignments ..................................................................................................... 10

1.3.2

Pin Functions .......................................................................................................... 25

Section 2 CPU........................................................................................................37

2.1

Processing States and Processing Modes ............................................................................. 37

2.1.1

Processing States..................................................................................................... 37

2.1.2

Processing Modes ................................................................................................... 38

2.2

Memory Map ....................................................................................................................... 39

2.2.1

Virtual Address Space............................................................................................. 39

2.2.2

External Memory Space.......................................................................................... 40

2.3

Register Descriptions ...........................................................................................................42

2.3.1

General Registers .................................................................................................... 45

2.3.2

System Registers..................................................................................................... 46

2.3.3

Program Counter..................................................................................................... 47

2.3.4

Control Registers .................................................................................................... 48

2.4

Data Formats........................................................................................................................ 51

2.4.1

2.4.2

Memory Data Formats ............................................................................................ 52

2.5

Features of CPU Core Instructions ...................................................................................... 54

2.5.1

Instruction Execution Method................................................................................. 54

2.5.2

CPU Instruction Addressing Modes ....................................................................... 56

2.5.3

Instruction Formats ................................................................................................. 60

2.6

Instruction Set ...................................................................................................................... 63

2.6.1

Instruction Set Based on Functions......................................................................... 63

2.6.2

Operation Code Map............................................................................................... 77

Section 3 DSP Operating Unit ...............................................................................81

3.1

DSP Extended Functions ..................................................................................................... 81

3.2

DSP Mode Resources .......................................................................................................... 83

3.2.1

Processing Modes ................................................................................................... 83

3.2.2

DSP Mode Memory Map........................................................................................ 83

3.2.3

CPU Register Sets................................................................................................... 84

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