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MPF0900AMMA2ES датащи(PDF) 122 Page - NXP Semiconductors |
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MPF0900AMMA2ES датащи(HTML) 122 Page - NXP Semiconductors |
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122 / 205 page ![]() NXP Semiconductors PF09 Nine-channel power management IC with advanced system safety monitoring aaa-056073 Regulation Monitoring VMON logic control Bandgap2 (MON_BG2) VMON DVS DAC SW controller Bandgap1 (REG_BG1) REG DVS DAC COMP/ DC gen OV/UV THR OV hyst VMON UV hyst UV_TH OV_TH UV Fault OV Fault SWxINA SWxFB SWxINB SWxLXA SWxLXB Figure 30. SW regulator VMON architecture aaa-056074 Bandgap1 (REG_BG1) Regulation Monitoring LDOxIN LDOxOUT VMON logic control Bandgap2 (MON_BG2) Digital controller OV/UV THR OV hyst VMON LDOxOUT UV hyst UV_TH OV_TH UV Fault OV Fault Figure 31. LDO VMON architecture The undervoltage (UV) monitoring threshold for the switching regulators (SW1- SW5) is set in the OTP registers via the OTP_SWx_UVTH[2:0] bits. OTP_SWx_UVTH[2:0] UV threshold 000 97.5% 001 97.0% 010 96.5% 011 96.0% Table 156. SWx UV threshold configuration bits PF09 All information provided in this document is subject to legal disclaimers. © 2026 NXP B.V. All rights reserved. Product data sheet Rev. 1.3 — 16 December 2025 Document feedback 122 / 205 |
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