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TMP93CS41 датащи(PDF) 238 Page - Toshiba Semiconductor |
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TMP93CS41 датащи(HTML) 238 Page - Toshiba Semiconductor |
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238 / 248 page ![]() TMP93CS40/TMP93CS41 2004-02-10 93CS40-236 6. Port Section Equivalent Circuit Diagram • Reading the circuit diagram Basically, the gate symbols written are the same as those used for the standard CMOS logic IC [74HCXX] series. The dedicated signal is described below. Stop: This signal becomes active “1” when the HALT mode setting register is set to the STOP mode and the CPU executes the HALT instruction. When the drive enable bit [DRVE] is set to “1”, however, stop remains at “0”. • The input protection resistance ranges from several tens of ohms to several hundreds of ohms. ■ P0 (AD0 to AD7), P1 (AD8 to AD15, A8 to A15), P2 (A16 to A23, A0 to A7) ■ P30 ( RD ), P31 ( WR ) Output data Output enable Stop Input data Input enable N-ch N-ch P-ch I/O Programmable pull-down resistance (only port 2) VCC Output data Stop VCC Output |
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